文件名称:Lab5.5_Led_FPGA
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Verilog LED FPGA仿真程序-Verilog LED FPG
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Lab5.5_Led_FPGA\db\Led.asm.qmsg
...............\..\Led.asm.rdb
...............\..\Led.cbx.xml
...............\..\Led.cmp.bpm
...............\..\Led.cmp.cdb
...............\..\Led.cmp.ecobp
...............\..\Led.cmp.hdb
...............\..\Led.cmp.kpt
...............\..\Led.cmp.logdb
...............\..\Led.cmp.rdb
...............\..\Led.cmp.tdb
...............\..\Led.cmp0.ddb
...............\..\Led.cmp_merge.kpt
...............\..\Led.db_info
...............\..\Led.eco.cdb
...............\..\Led.fit.qmsg
...............\..\Led.hier_info
...............\..\Led.hif
...............\..\Led.lpc.html
...............\..\Led.lpc.rdb
...............\..\Led.lpc.txt
...............\..\Led.map.bpm
...............\..\Led.map.cdb
...............\..\Led.map.ecobp
...............\..\Led.map.hdb
...............\..\Led.map.kpt
...............\..\Led.map.logdb
...............\..\Led.map.qmsg
...............\..\Led.map_bb.cdb
...............\..\Led.map_bb.hdb
...............\..\Led.map_bb.logdb
...............\..\Led.pre_map.cdb
...............\..\Led.pre_map.hdb
...............\..\Led.rtlv.hdb
...............\..\Led.rtlv_sg.cdb
...............\..\Led.rtlv_sg_swap.cdb
...............\..\Led.sgdiff.cdb
...............\..\Led.sgdiff.hdb
...............\..\Led.sld_design_entry.sci
...............\..\Led.sld_design_entry_dsc.sci
...............\..\Led.smart_action.txt
...............\..\Led.syn_hier_info
...............\..\Led.tan.qmsg
...............\..\Led.tis_db_list.ddb
...............\..\Led.tmw_info
...............\..\logic_util_heursitic.dat
...............\incremental_db\compiled_partitions\Led.root_partition.cmp.cdb
...............\..............\...................\Led.root_partition.cmp.dfp
...............\..............\...................\Led.root_partition.cmp.hdb
...............\..............\...................\Led.root_partition.cmp.kpt
...............\..............\...................\Led.root_partition.cmp.logdb
...............\..............\...................\Led.root_partition.cmp.rcfdb
...............\..............\...................\Led.root_partition.cmp.re.rcfdb
...............\..............\...................\Led.root_partition.map.cdb
...............\..............\...................\Led.root_partition.map.dpi
...............\..............\...................\Led.root_partition.map.hdb
...............\..............\...................\Led.root_partition.map.kpt
...............\..............\README
...............\Led.asm.rpt
...............\Led.done
...............\Led.dpf
...............\Led.fit.rpt
...............\Led.fit.smsg
...............\Led.fit.summary
...............\Led.flow.rpt
...............\Led.map.rpt
...............\Led.map.summary
...............\Led.pin
...............\Led.pof
...............\Led.qpf
...............\Led.qsf
...............\Led.sof
...............\Led.tan.rpt
...............\Led.tan.summary
...............\Led.v
...............\Led_assignment_defaults.qdf
...............\incremental_db\compiled_partitions
...............\db
...............\incremental_db
Lab5.5_Led_FPGA