文件名称:C5G_ADC_GRAPHIC_1110

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2014-11-26
  • 文件大小:
  • 9.04mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • q*
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关于altera最新的C5代的开发板的HDMI显示资料-C5 on the latest generation of altera development board HDMI display information
(系统自动生成,下载前可以参看下载内容)

下载文件列表





.qsys_edit

..........\filters.xml

..........\preferences.xml

adc_data_fifo.qip

C5G_HDMI.cdf

C5G_HDMI.done

C5G_HDMI.dpf

C5G_HDMI.fit.smsg

C5G_HDMI.fit.summary

C5G_HDMI.htm

C5G_HDMI.jdi

C5G_HDMI.map.smsg

C5G_HDMI.map.summary

C5G_HDMI.pin

C5G_HDMI.pof

C5G_HDMI.qpf

C5G_HDMI.qsf

C5G_HDMI.qws

C5G_HDMI.sdc

C5G_HDMI.sof

C5G_HDMI.sta.summary

C5G_HDMI.tis_db_list.ddb

C5G_HDMI.v

C5G_HDMI_assignment_defaults.qdf

c5_pin_model_dump.txt

cio_dump_disallowed_lists.echo

demo_batch

..........\C5G_HDMI.pof

..........\C5G_HDMI.sof

..........\DEMO.elf

..........\epcq_programming.bat

..........\test.bat

..........\test.sh

greybox_tmp

...........\cbx_args.txt

hc_output

.........\C5G_HDMI.names_drv_tbl

hdmi.stp

hdmi_auto_stripped.stp

HDMI_QSYS

.........\synthesis

.........\.........\HDMI_QSYS.qip

.........\.........\HDMI_QSYS.v

.........\.........\submodules

.........\.........\..........\adc_data_fifo.v

.........\.........\..........\adc_ltc2308.v

.........\.........\..........\adc_ltc2308_fifo.v

.........\.........\..........\afi_mux_lpddr2.v

.........\.........\..........\altdq_dqs2_acv_cyclonev_lpddr2.sv

.........\.........\..........\altera_avalon_dc_fifo.v

.........\.........\..........\altera_avalon_mm_bridge.v

.........\.........\..........\altera_avalon_mm_clock_crossing_bridge.v

.........\.........\..........\altera_avalon_packets_to_master.v

.........\.........\..........\altera_avalon_sc_fifo.v

.........\.........\..........\altera_avalon_st_bytes_to_packets.v

.........\.........\..........\altera_avalon_st_clock_crosser.v

.........\.........\..........\altera_avalon_st_handshake_clock_crosser.v

.........\.........\..........\altera_avalon_st_idle_inserter.v

.........\.........\..........\altera_avalon_st_idle_remover.v

.........\.........\..........\altera_avalon_st_jtag_interface.sdc

.........\.........\..........\altera_avalon_st_jtag_interface.v

.........\.........\..........\altera_avalon_st_packets_to_bytes.v

.........\.........\..........\altera_avalon_st_pipeline_base.v

.........\.........\..........\altera_dcfifo_synchronizer_bundle.v

.........\.........\..........\altera_irq_clock_crosser.sv

.........\.........\..........\altera_jtag_dc_streaming.v

.........\.........\..........\altera_jtag_sld_node.v

.........\.........\..........\altera_jtag_streaming.v

.........\.........\..........\altera_mem_if_dll_cyclonev.sv

.........\.........\..........\altera_mem_if_oct_cyclonev.sv

.........\.........\..........\altera_mem_if_sequencer_cpu_cv_synth_cpu_inst.v

.........\.........\..........\altera_mem_if_sequencer_cpu_cv_synth_cpu_inst_test_bench.v

.........\.........\..........\altera_mem_if_sequencer_mem_no_ifdef_params.sv

.........\.........\..........\altera_mem_if_sequencer_rst.sv

.........\.........\..........\altera_merlin_address_alignment.sv

.........\.........\..........\altera_merlin_arbitrator.sv

.........\.........\..........\altera_merlin_burst_adapter.sv

.........\.........\..........\altera_merlin_burst_uncompressor.sv

.........\.........\..........\altera_merlin_master_agent.sv

.........\.........\..........\altera_merlin_master_translator.sv

.........\.........\..........\altera_merlin_slave_agent.sv

.........\.........\..........\altera_merlin_slave_translator.sv

.........\.........\..........\altera_merlin_traffic_limiter.sv

.........\.........\..........\altera_merlin_width_adapter.sv

.........\.........\..........\altera_pli_streaming.v

.........\.........\..........\altera_reset_controller.sdc

.........\.........\..........\altera_reset_controller.v

.........\.........\..........\altera_reset_synchronizer.v

.........\.........\..........\alt_cusp130_addsubcarry.vhd

.........\.........\..........\alt_cusp130_atlantic_reporter.vhd

.........\.........\..........\alt_cusp130_au.vhd

.........\.........\..........\alt_cusp130_avalon_st_input.vhd

.........\.........\..........\alt_cusp130_avalon_st_output.vhd

.........\.........\..........\alt_cusp130_clock_reset.vhd

.........\.........\..........\alt_cusp130_cmp.vhd

.........\.........\..........\alt_cusp130_lu.vhd

.........\.........\..........\alt_cusp130_mem

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