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  1. leon3-altera-ep2s60-ddr

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  2. The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent method for simulation and synth
  3. 所属分类:其它

    • 发布日期:2008-10-13
    • 文件大小:103163
    • 提供者:岳昆
  1. leon3-altera-ep2s60-sdr

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  2. ahb sdram interface.arm cpu series,include controller
  3. 所属分类:其它资源

    • 发布日期:2008-10-13
    • 文件大小:98080
    • 提供者:lhxmodelsim
  1. leon3-altera-ep2s60-ddr

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  2. This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be r
  3. 所属分类:其它资源

    • 发布日期:2008-10-13
    • 文件大小:114780
    • 提供者:king.xia
  1. cpu-leon3-altera-ep2s60-ddr

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  2. 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的DDR控制器程序!
  3. 所属分类:其它资源

    • 发布日期:2008-10-13
    • 文件大小:753022
    • 提供者:zhao onely
  1. leon3-altera-ep2s60-ddr

    0下载:
  2. The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent method for simulation and synth
  3. 所属分类:其他小程序

    • 发布日期:2024-11-01
    • 文件大小:103424
    • 提供者:岳昆
  1. leon3-altera-ep2s60-sdr

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  2. ahb sdram interface.arm cpu series,include controller
  3. 所属分类:中间件编程

    • 发布日期:2024-11-01
    • 文件大小:98304
    • 提供者:
  1. leon3-altera-ep2s60-ddr

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  2. This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be r
  3. 所属分类:VHDL编程

    • 发布日期:2024-11-01
    • 文件大小:114688
    • 提供者:
  1. cpu-leon3-altera-ep2s60-ddr

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  2. 一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的DDR控制器程序!-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of DDR controller program!
  3. 所属分类:VHDL编程

    • 发布日期:2024-11-01
    • 文件大小:752640
    • 提供者:zhao onely
  1. DDR

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  2. leon ep2s60 ddr use altera statix2 and add ddr sdram-leon ep2s60 ddr
  3. 所属分类:VHDL编程

    • 发布日期:2024-11-01
    • 文件大小:752640
    • 提供者:free

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