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LCD
- ALTERA上DE2平台，使用LCD模块，在LCD上显示字母字符。与已有程序相比，程序更加优化，代码更少。-ALTERA on DE2 platform, the use of LCD modules, LCD display in alphabetic characters. Compared with the existing procedures, procedures more optimized, less code.
Time
- ALTERA上DE2平台，利用内部50M Hz时钟，在数码管模拟显示时间(时分秒)。-ALTERA on DE2 platform, using internal 50M Hz clock, in the digital control simulation show time (hours minutes and seconds).
main
- altera de2 sd 卡源程序。调试成功的-altera de2 sd card source. Debugging success
DE2_SD_Card_Audio
- 用于altera公司DE2开发板上SD_Card_Audio的实例-DE2 development company for the altera board SD_Card_Audio examples
DE2_TV
- 用于Altera公司DE2开发板的TV demonstration-Altera Corporation for DE2 development board of the TV demonstration
DE2_USB_API
- 用于AlRERA 公司DE2开发板上的USB 调试的实例-AlRERA company for the DE2 development board USB debug example
DE2_CCD_CV
- altera DE2 实验板专用 CCD驱动-altera DE2 board dedicated CCD driver
DE2_LCM_CCD
- 在altera DE2 的开发板上采集图像，到lcd显示的原程序 。-In altera DE2 development board collecting images, lcd display to the original procedure.
DE2_70_User_manual_v101
- Altera DE2-70开发板的使用手册-Altera DE2-70 development board manual
DE2_with_VGA_LCM
- altera de2 开发板 vga lcd控制quatus 工程-altera de2 board vga lcd control quatus works
Binary_VGA_Controller
- de2 vga控制器，也可用于其他板子开发-de2 vga controller board can also be used for other development
Sdram_Control_4Port
- DE2开发板提供的四端口SDRAM驱动，用户不需要对SDRAM直接操作，把SDRAM对用户透明化-DE2 development board provides four-port SDRAM drive, users do not need to direct the operation of the SDRAM, the SDRAM transparent to users
DE2_CCD_binary
- verilog DE2 binary image (form CCD to VGA) output
DE2_VGA3
- The VGA example generates a 320x240 diffusion-limited-aggregation (DLA) on Altera DE2 board. A DLA is a clump formed by sticky particles adhering to an existing structure. In this design, we start with one pixel at the c
vga
- 基于DE2板子的，VGA 图像显示，采用verilog语言-Based on the DE2 board, VGA image display, using Verilog language
DE2_CCD
- CCD的驱动程序，用于DE2板，可显示出摄像头采集的图像数据。-CCD driver for the DE2 board, show the camera s image data collection.
DE2_NIOS_LITE_SRAM
- DE2-SRAM-IP-CORE 需要开发ip core的朋友可以参考哦 ~-DE2-SRAM-IP-CORE need to develop friends can ip core reference Oh ~
VHDL_VGA_Controller
- 基于DE2板子的，采用VHDL硬件描述语言实现图形的控制-Based on the DE2 board, and the use of VHDL hardware descr iption language to achieve control of graphics
HardwareUDP
- Hardware UDP, implementation of UDP based on Altera DE2 using Verilog
altera_sdram
- Simple SDRAM controller source code for Altera DE2 board