搜索资源列表
traffic_control
- 软件开发环境：ISE 7.1i 仿真环境：ISE Simulator 1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共八个灯的交通灯控制器； 2. 工程在project文件夹中，双击traffic.ise文件打开工程； 3. 源文件在rtl文件夹中，traffic.v为设计文件，traffic_tb.tbw是仿真波形文件； 4. 打开工程后，在工程浏览器中选择traffic_tb.t
ISE_Keil_C_ICCAVR_guide
- ISE、Keil_C，ICCAVR的快速入门指南，帮助新手快速的使用。-ISE, Keil_C, ICCAVR the Quick Start Guide to help the novice to use fast.
ISE_chinese
- Xilinx ISE中文简明教程、Xilinx术语中文.pdf、Virtex 系列 FPGA 的配置和回读、FPGA设计检查清单.pdf、设计注意.pdf、逻辑设计注意列表.pdf-Xilinx ISE Chinese Concise Guide, Xilinx Chinese terminology. Pdf, Virtex Series FPGA configuration and read-back, FPGA design ch
I2C
- I2C 串口通讯Xilinx项目源码 拷贝到硬盘，用ISE打开工程文件即可。-I2C Serial Communication Xilinx source project are copied to the hard drive, using ISE project file can be opened.
VGADIY
- 自己编的VGA彩条信号发生器verilog ise环境-Own the VGA color signal generator verilog ise Environment
XilinxISE9.X
- 该源码为xilinx ise教程的附带光盘源码，可供广大初学者使用-The source for the xilinx ise Tutorial CD-ROM attached to the source for the broad masses of beginners
project_UHF_ddc
- vhdl语言写的数字下变频的实现，整个工程文件，xlinx ise用的-VHDL language written in the realization of digital down conversion, the whole project file, xlinx ise used
SRAM
- 使用方法： SRAM编程,拷贝到硬盘，用ISE打开工程文件即可-Usage: SRAM programming, copied to the hard drive, open the project file with ISE can
Chapter10
- 使用方法： 以太网编程,拷贝到硬盘，用ISE打开工程文件即可-Usage: Ethernet programming, copied to the hard drive, open the project file with ISE can
ECCgenAndLoc
- 基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序，EccErrLoc文件夹为ECC错误定位程序。-Xilinx ISE environment based on the development of VHDL the NAND flash ECC to achieve, eccGen256Byte folder produced for the ECC
Xilinx_FPGA
- 介绍了FPGA设计全流程：Modelsim>>Synplify.Pro>>ISE-Introduced the entire FPGA design process: Modelsim>> Synplify.Pro>> ISE
ADC_INTERFACE
- it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit. -it is a verilog code written for MAX1886 ADC interin modelsim simulator and
FIFO
- it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which da
traffic_controller
- it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.-it is a verilog code writt
UART_for_FPGArar
- it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]-it is a verilog code written for MELAY state mac
clock
- 软件开发环境：ISE 7.1i 仿真环境：ModelSim SE 6.0 1. 多功能数字钟-Software development environment: ISE 7.1i simulation environment: ModelSim SE 6.0 1. Multi-function digital clock
DUC
- 基于XILINX ISE下的数字上变频设计，其中用到了XILINX的乘法IP。已经通过工程实用，好用。-XILINX ISE based on frequency of figure design, use one of the XILINX multiplication IP. Has passed the project practical, easy to use.
D_BLAST44
- MIMO 4*4系统D-BLAST编译码方案，利用ISE仿真环境，verilog编程实现。-MIMO 4* 4 system codec D-BLAST program, using ISE simulation environment, verilog programming implementation.
ise_keygen
- to generate keygen for xilinx ise edk 8.1 9.1 9.2
Xilinx
- to generate keygen for xilinx family ise edk