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lfsr.v.tar
- linear feedback shift register for generator in verilog code for random sequence generation.
B-M
- B-M算法的实现，求出产生M序列的最短LFSR的联接多项式，调试成功，可以运行-BM algorithm, find the shortest LFSR sequence generated M join polynomials, debug successfully, you can run
LFSRTest
- test program for LFSR operation
LFSRRC4
- 伪随机数发生器LFSR RC4加密与解密 根据算法原理，首先初始化S-BOX，产生伪随机序列密钥流，选择所加密文件与密钥流异或生成密文 -Pseudo-random number generator LFSR RC4 algorithm for encryption and decryption based on the principle, first initialize the S-BOX, pseudo-random s
UHF-RFID-CRC
- 本文首先研究了IsO／IECl8000．6标准中A、B两类短程通讯的前向链路与返回 链路的数据编码方式，对(FMO)双相间隔编码、(PIE)脉冲间隔编码、曼切斯特码 的编解码方式和技术参数进行了深入的分析，并利用FPGA实验平台对这三种编 码的编、解码电路进行了设计和仿真。然后对UHF RFID系统的差错控制技术原理 进行了探讨，重点研究了ISo／IECl8000．6标准中采用的数据保护与校验技术，即 循环冗余校验(
ass1_2_hamming
- Hamming codes are a class of binary linear codes. They can detect up to two simultaneous bit errors, and correct single-bit errors. In particular, a single-error-correcting and double error detecting variant commonly ref
2
- LFSR and stream password \ generate nonlinear sequences \ DES algorithm for encryption and decryption operations, in front of a few relatively simple, DES algorithm results also
VHDL
- For the animal file: we built a system that took in a UAC code and output if the animals need vaccines and if we are in danger of being eaten Seven_segment Clock_Design : built a clock State_machine: RoboRacer gam
CRC-Parallel-Computation
- 用软件实现CRC校验码计算很难满足高速数据通信的要求， 基于硬件的实现方法中， 有串行经典算法LFSR,电路以及由软件算法推导出来的其它各种并行计算方法。以经典的LFSR,电路为基础， 研究了按字节并行计算CRC校验码的原理.-Implemented in software CRC checksum calculation is difficult to meet the requirements of high-speed data
generic_fifo_yh
- Generic, multi-purpose FIFOs. Available as single clock and dual clock version, binary, lfsr, and gray encoded (dual clock only). All are parameterizable and use generic_memories for memory. These FIFOs are fully portabl
lfsr
- simple PRBS generator using verilog hdl
LFSR-Code
- wire less lan program
LFSR_UPDOWN_Verilog
- the LFSR up/down counter are designed in a verilog module easy to implement in any counter operation.
LFSR
- Linear Feedback Shift Register created to generate random numbers
lfsr
- 用于扩频通信中的M序列产生器 数控振荡器中可以提高SFDR参数-M series generater
MinLFSR
- 利用BM算法进行扰码多项式以及初态的识别，亦即最小LFSR的识别。-Identify scrambler polynomial and the initial state with BM algorithm, which is actually the identification of minimum LFSR.
mSequences
- Maximum Length PN sequences are binary sequence generators that are capable of outputting all possible combinations of binary sequences in 2^m-1 cyclic shifts, where m is the size of the LFSR (Linear Feedback Shift Regis
hw08.ps
- Maximum Length PN sequences are binary sequence generators that are capable of outputting all possible combinations of binary sequences in 2^m-1 cyclic shifts, where m is the size of the LFSR (Linear Feedback Shift Regis
RSN
- “Randomized Smoothing Networks” introduced the idea of using networks composed of a type of comparator/memory element, initialized to random initial states, to create smoothing networks, which take arbitrary input loads
LFSR_23
- LFSR (Linear Feedback Shift Register) for polynomial (23,18)