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sy89832u
- Ultra-precision 1:4 LVDS Fanout Differential Translator with internal termination
PCILVDSdatasheet
- 这是PCI&LVDS接口开发板用户手册，里面有详细的说明-This is a development board PCI & LVDS interface, user manual, which are described in detail
lvds
- low voltage signalling
paper_FPGA
- 基于FPGA控制的高速固态存储器设计，对固态存储器进行了需求分析, 根据航天工程对高速固态存储器的需求, 确定了设计方案。 针对航天工程对高速固态存储器速率要求较高的特点, 在逻辑设计方面采用流水线技术、并行总线技术。在器件选择方面, 采用LVDS构成接口电路, FPGA构成控制逻辑电路电路, SDRAM芯片阵列构成存储电路。设计了高速固态存储器。该设计简化了硬件电路, 大大提高了存储数据的速率。-FPGA-based contro
DingSection-TV-program
- 鼎科TV程序,包含LVDS、TTL等类型，适合采用该液晶驱动芯片液晶电视在线烧录使用-Ding Section TV programs, including LVDS, TTL and other types, suitable for LCD TVs in the LCD driver chip using the online recording
(TTLCMOSLVTTLLVCMOSECLPECLLVPECLRS232RS485)
- 现在常用的电平标准有TTL、CMOS、LVTTL、LVCMOS、ECL、PECL、LVPECL、RS232、RS485等，还有一些速度比较高的LVDS、GTL、PGTL、CML、HSTL、SSTL等。 -Now commonly used level standards TTL, CMOS, LVTTL, LVCMOS, ECL, PECL, LVPECL, RS232, RS485, etc., there are relativ
lvpecl_connect_lvds
- 在FPGA间实现LVDS和LVPECL互联时的用法，比如如何做匹配网络-Achieved in the FPGA LVDS and LVPECL interconnection between the time of usage, such as how to do the matching network
AN1002
- 一种高速串行通讯中需要用的PECL，LVEPCL，CML与LVDS之间的电平转换。-A high-speed serial communication with the need PECL, LVEPCL, with the level LVDS between CML.
PCM-9361_User_Manual_ed
- 研华PCM-9361嵌入式工控开发板说明书-The PCM-9361 is a 3.5" SBC (Single Board Computer) with Embedded Intel® Atom N270 1.6 GHz Processor. PCM-9361 can support DDR2 memory up to 2GB, has five USB 2.0 compatible ports, Giga LAN (
VXule
- VXI总线四通道LVDS数据传输模块设计VX 喜欢的可以看下-VXI bus, four channel LVDS Data Transfer Module
stem
- 实时高速LVDS串行数据采集系统的设计Real-time high-speed LVDS serial data acquisition system-Real-time high-speed LVDS serial data acquisition system
VD
- 实时高速LVDS串行数据采集系统的设计-Real-time high-speed LVDS serial data acquisition system
doc0818F
- • Dual ADC with 8-bit Resolution • 500 Msps Sampling Rate per Channel, 1 Gsps in interleaved Mode • Single or 1:2 Demultiplexed Output • LVDS Output Format (100Ω) • 500 mVpp Analog Input
doc0846H
- Main Features • Quad ADC with 8-bit Resolution – 1.25 Gsps Sampling Rate in Four-channel Mode – 2.5 Gsps Sampling Rate in Two-channel Mode – 5 Gsps Sampling Rate in One-channel Mode – Built-in four-by-four
LTN101NT06-001
- LTN101NT06-001液晶屏，支持1024*600分辨率，LVDS驱动，大小尺寸为10.1，大视角-LTN101NT06-001，is a color active matrix TFT (Thin Film Transistor)liquid crystal display(LCD)that uses amorphous silicon
LVDS
- 很好一份关于电路接口的讲义，很有参考的价值，希望对大家有用！-A very good lecture on the circuit interface, the value of a good reference, we hope to be useful!
ecp3_70ea_loopback
- ecp3的loopback demo,lattice的7 1LVD回环测试-// Project: 7:1 LVDS Video Interface // File: LVDS_7_to_1_TX.v // Title: LVDS_7_to_1_TX // Descr iption: Tx module of this referenc
technolgoy
- 基于FPGA和LVDS技术的光缆传输技术-Longterm cable transmission technology based on FPGA and LVDS technology