搜索资源列表
lvds_tx_rx_ok
- nios系统下LVDS的ip源码，已验证可使用，可挂接到AVELEN总线-Nios system
receivermegafunction
- lvds receiver megafunction，-lvds receiver megafunction,
transmittermegafunction
- lvds transmitter megafunction -lvds transmitter megafunction
diff_io_top
- LVDS的应用的Verilog HDL例子程序，由altera公司提供。-LVDS Application of Verilog HDL examples of procedures provided by the altera.
xapp485
- XILINX公司关于平板显示"LVDS接收"的参考设计,已经过验证非常成熟,用于使用FPGA来做图象增强,Gamma校正,动态背光控制等的设计! -XILINX company on the flat panel display
LVDS_Owner.s_Manual_Low-Voltage_Differentia_Signal
- LVDS Owner.s Manual_Low-Voltage_Differentia_Signaling
io_lvds
- xilinx LVDS接口程序,xilinx LVDS接口程序-xilinx LVDS interface program,xilinx LVDS interface program
fpga_designing_lvds_communication
- 开发 fpga LVDS的通信文档,pdf格式。应该对你的设计有帮助-fpga design lvds，pdf format, you can study thids
LVDS_Serdes_list_FPGA1
- FPGA之间的LVDS传输，采用serdes接口，传输速率达到400m-LVDS transmission between the FPGA using serdes interface, transfer rate up to 400m
LVDS_DDR_List_FPGA2
- FPGA芯片与ADI公司的AD9779之间的通信，总共有四个通道，68对LVDS,采样时钟是122.88MHz-FPGA chips ADI' s AD9779 and communication between, a total of four channels, 68 pairs of LVDS, the sampling clock is 122.88MHz
AML7218_LVDS
- 一份很成熟的方案AML7218+LVDS的原理图和规格书-A very mature program AML7218+ LVDS schematic diagram and specifications of the book
AD9517_Ccode
- 压缩包中为AD9517的C语言单片机控制源代码，已在实际电路调试成功，使用AD9517内部VCO，LVDS和LVPECL输出模式可选。 -Compressed package for the AD9517 single-chip control of the C language source code, has been successful in the actual circuit debugging, use the AD9
DVB_SPI_Interface_Sample
- DVB-SPI Interface allow communications between USB 2.0 equipped computer and LVDS-based DVB-SPI interfaces
lvds6
- 实现了LVDS高速传输，对于相开发高速数据传输的人很有用。-Achieved high-speed LVDS for high-speed data transmission with the development of the people very useful.
LPC
- 详细介绍LVDS，CML，PECL的电路原理，以及他们之间的耦合方式，通信专业人士用。-Details LVDS, CML, PECL circuit principle, as well as the coupling between them, communication with professionals.
xapp622
- 644 MHz SDR LVDS 发射器/接收器(verilog and doc)-644-MHz SDR LVDS Transmitter/Receiver
xapp860
- 16通道DDR的LVDS接口（VHDL,Verilog and doc）-16-Channel, DDR LVDS Interface with Real-Time Window Monitoring
linkport
- td通信系统中FPGA与DSP之间使用linkport（LVDS）传输的源代码，包括源代码和实际速率测试报告-TD-SCDMA,linkport,lvds