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A New Phase-Locked Loop (PLL) System
- An enhanced phase-locked loop (PLL) system is presented and its properties and performance characteristics are investigated. Advantages of the proposed PLL structure over the conventional PLLs including its capability of direct estimation of ampli
Phase Locked Loop.mdl
- Phase Locked Loop model for matlab
给移动存储器加锁解锁
- 给移动存储加锁和解锁，简单实用的vb程序-to mobile storage locked and unlocked, simple and practical procedure vb
时钟小程序 v 1.0
- 时钟小程序 v 1.0功能： 显示当前时间 界面有半透明效果 能锁定到桌面，使之不能移动 当然也能解锁，使之能够移动到你想要的地方 结束程序，退出 -clock small programs v 1.0 features : they show the current time interface with translucent effects can be locked to a desktop, so of course they are not mobi
PhaseLockedLoop
- ％The phase locked loop(PLL),adjusts the phase of a local oscillator ％w.r.t the incoming modulated signal.In this way,the phase of the ％incoming signal is locked and the signal is demodulated.This scheme ％is used in PM and FM as well. ％We wi
PLL
- 几个锁相环仿真程序－通信技术－不记得哪来的啦。希望有用……。-Several phase-locked loop simulation program- communication technologies- do not remember you come from. Seek to help ... ....
DigitalPLL
- 一篇简单易懂的关于数字锁相环概念原理设计的经典文章-An easy-to-read digital phase-locked loop on the concept of the classic principles of design article
matlab
- pll锁相环仿真程序，经过测试，并附上仿真图，值得学习-pll phase locked loop simulation program, tested with the simulation map, it is worth learning
dpll
- 数字锁相环，采用costas环的数字形式，实现跟踪载波相位，-Digital phase-locked loop, using the digital form costas loop to achieve carrier phase tracking,
pll
- 该程序实现的锁相环，运行环境为matlab，二阶的环路滤波器-The program realization of phase-locked loop, operating environment for matlab, the second-order loop filter
dpll_fpga
- 基于FPGA设计数字锁相环，提出了一种由微分超前/滞后型检相器构成数字锁相环的Verilog-HDL建模方案-FPGA-based design of digital phase-locked loop, a by the differential ahead of/lag type seizure constitutes a digital phase-locked loop phase of the Verilog-HDL modeling program
MC145152
- 1、数字锁相环的单片机代码。 2、单片机与数字锁相环MC145152的应用系统的设计与实现。-1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
thermal_DLL
- gps延迟锁定环中对热噪声的模拟，考虑了热噪声对跟踪精度的影响，很不错的-gps delay locked loop in the thermal noise of the simulation, taking into account thermal noise on the impact of tracking accuracy, very good
phase-locked
- 主要是关于锁相环的环路滤波设计与计算，非常经典的-Mainly on the phase-locked loop filter design and calculation, very classic
pll
- 模拟锁相环（apll）的一些simulink模型-Analog phase-locked loop (apll) some simulink model
Phase_Locked_Loop
- Very good code for Phase locked Loop in matlab
PLL
- 锁相环问题的仿真，可以解决数字锁相环的仿真问题-Phase-locked loop simulation problem, can solve the problem of digital phase-locked loop simulation
PhaseLockedLoop
- This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both
SUOXIANG222
- 锁相环的MATLAB SIMULINK编程，可以供研究锁相环的人员使用-MATLAB SIMULINK programming the phase-locked loop, you can study for the use of Phase-Locked Loop
Phase Locked Loop
- 锁相环matlab仿真模拟代码，通过相位实现调控(Phase locked loop matlab simulation code, control by phase)