搜索资源列表
an499_design_example
- cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
DDR_SDRAM_verilog
- DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good
SDRAMController
- SDRAM Controller 设计详细文档 ，很有参考价值！-SDRAM Controller Design of detailed documentation, a good reference!
DDR_SDRAM_controller
- DDR SDRAM控制器的VHDL源代码，含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Cl
newSD
- 基于Verilog的完整SDRAM控制器时序代码-Based on a complete Verilog timing SDRAM controller code
sdram_ver_134
- SDRAM控制器的源代码打包下载，不错不错值得-SDRAM controller source code pack download, well worth a good try
VerilogfoFPGAbasedSDRAMController
- 使用Verilog实现基于FPGA的SDRAM控制器-The use of Verilog for FPGA-based SDRAM Controller
hssdrc_latest
- SDRAM 控制器 Verilog实现，很有借鉴意义。-SDRAM controller core Verilog implementation。With good referential significance.
SDRAM_VerilogCode
- 基于FPGA的SDRAM控制器Verilog代码，开发环境为Quartus6.1，控制SDRAM实现对同一片地址先写后读。-FPGA-based SDRAM controller Verilog code, development environment for Quartus6.1, control of SDRAM to achieve the same address one after the first time to wri
Sdram_Control_4Port
- SDRAM控制器HDL实现，sdram为美光公司的-sdram controller
module
- SDRAM控制器源代码，已经过调试，可以试用一下。-SDRAM controller source code, has been testing, you can try.
SDRAMcontrollor
- SDRAM控制器，以下是我用VHDL编写SDRAM Controller的全部资料。文档提供的SDRAM控制器能工作在125MHz，我在实际工程中用到了120MHz，但没有再往上做测试了-SDRAM controller, the following is my SDRAM Controller using VHDL to prepare all the information. Documentation provided by SD
SDRAM
- verilog 128位 突发4. sdr fpga控制器-verilog 128 bit unexpected 4. sdr fpga controller
ddr_verilog_xilinx
- xilinx的ddr sdram控制器文档-xilinx of ddr sdram controller documentation
ddr_sdram_controller_vhdl
- DDR SDRAM控制器的VHDL代码已经测试-DDR SDRAM controller VHDL code
FPGAbasedSDRAMControll
- 基于FPGA的SDRAM控制器 Realization FPGA-based SDRAM Controller with Verilog-FPGA-based SDRAM Controller Realization FPGA-based SDRAM Controller with Verilog
DDRSDRAMcontroller
- DDRⅡ+SDRAM控制器设计实现相关学问论文，希望对基于ＦＰＧＡ实现ＳＤＲＡＭ控制的有所帮助-DDRⅡ+SDRAM ｃｏｎｔｒｏｌｌｅｒ.rar
burstpage
- SDRAM控制器在FPGA实现源代码，能实现burst传输-SDRAM controller in FPGA realization of the source code, can achieve burst transfer
AMBA
- 基于AMBA总线的DDR2 SDRAM控制器研究与实现-AMBA bus-based Research and Implementation of DDR2 SDRAM Controller
control_interface
- sdram控制器i/o接口模块的VHDL源程序文件，可直接用-sdram interface