搜索资源列表
memory_test.c
- SDRAM的测试源代码包括谷值测试和写入测试还有其他一个测试方法-SDRAM test source code, including test and written test valley there are other ways a test
SDRAM_0
- verilog写的sdram控制测试程序,测试成功了,可以直接在飓风2上跑-sdram verilog write control testing procedures, the test is successful, you can run directly on the Hurricanes 2
test_sdram
- SDRAM的测试程序,DSP为DM642,可以实现SDRAM的初始化、写入与读回校验功能。-DSP program for sdram testing, has the function of initialization, write in and read back for CRC.
Sandpoint_init_20140612_2
- 适用用fresscale ppc的MPC845处理器的配置文件,此配置文件可用于code warrior软件,可用于SDRAM 的诊断,对SDRAM进行读写,也适用于flash programmer,能对EEPROM(AM29LV040BT)进行烧写文件,实际测试可行。-Applicable with fresscale ppc the MPC845 processor configuration file, this profile
yuanchengxu
- DMC-9263-E采用基于ARM926EJ-S内核的ATMEL处理器AT91SAM9263, 运行频率200MHz。板载64MB的SDRAM,64MB的Nand Flash,2MB的Data Flash。DMC-9263-E嵌入式开发系统外设非常丰富,功能强大,可扩展性强,低功耗。适用于纺织行业、数控行业、汽车电子、工业触摸屏控制系统、机器人视觉、媒体处理无线应用、数字家电、车载设备、通信设备、网络终端等场合。支持嵌入式Linux和W
DMC2440H
- DMC-2440-H采用基于ARM920T内核的Samsung处理器 S3C2440A, 标准主频400MHz,最高主频可达533MHz。采用64MB的SDRAM,2MB的NOR FLASH和64MB的NAND Flash。DMC-2440-H嵌入式开发系统外设非常丰富,功能强大,适用于各种手持设备、消费电子和工业控制设备的开发。支持嵌入式Linux和WINCE5.0.NET操作系统。 采用Linux -2.6.134内核,LINU
DMC2440I
- DMC-2440-I采用基于ARM920T内核的Samsung处理器 S3C2440A, 标准主频400MHz,最高主频可达533MHz。板载64MB的SDRAM,128MB的Nand Flash以及2MB的Nor Flash。DMC-2440-I是根据S3C2440A的全部功能而开发的全功能嵌入式系统。具有外接资源丰富,性能稳定,低功耗低等特点。适合手持设备的设计开发。支持嵌入式Linux和WINCE5.0.NET操作系统。提供Win
nand
- tq2440开发板裸机测试代码 用于测试nand启动大于4K从nand拷贝到SDRAM过程,测试通过。-TQ2440 development board bare metal test code Used for testing the NAND promoter than 4K copy NAND to SDRAM process, testing through.
4_SDRAM_710
- 基于5509A的SDRAM的汇编测试程序,测试好用的程序-Based on a compilation of 5509A of SDRAM test program, test the program easy to use
nios_EPCS_SDRAM
- 基于niso ii 13.1开发的测试系统,使用QSYS设计了硬件系统,包含了全部模块,在硬件基础上开发了相应的软件,测试成功了epcs 和sdram,基于DE2开发板,可以直接使用!大家只需要开发软件即可!-DE2 FPGA NIOS 13.1
USB2.0
- usb2.0+FPGA+SDRAM一整套测试程序- usb2.0+ FPGA+ SDRAM set of test procedures
sdram_5
- SDRAM的verilog描述,包含顶层设计,测试平台代码,精确描述-SDRAM is verilog descr iption, including top-level design, testbench code, an accurate descr iption of
sdram_latest.tar
- SDRAM的控制代码,包含文档说话和testbench测试代码-SDRAM control code, including documents speak and testbench test code
niefou_V2.5
- 单径或多径瑞利衰落信道仿真,实现用SDRAM运行nios,同时用SRAM保存摄像头数据,本科毕设要求参见标准测试模型。- Single path or multipath Rayleigh fading channel simulation, Implemented with SDRAM run nios, while saving camera data SRAM, Undergraduate complete set require
sdr_ctrl_latest.tar
- SDRAM控制器设计源码,内含仿真代码,测试通过-SDRAM controller design source code, include simulation code, test by
fanpie_v10
- pwm整流器的建模仿真,本科毕设要求参见标准测试模型,实现用SDRAM运行nios,同时用SRAM保存摄像头数据。- Modeling and simulation pwm rectifier Undergraduate complete set requirements refer to the standard test models, Implemented with SDRAM run nios, while saving ca
junyun
- 实现用SDRAM运行nios,同时用SRAM保存摄像头数据,本科毕设要求参见标准测试模型,数据包传送源码程序。- Implemented with SDRAM run nios, while saving camera data SRAM, Undergraduate complete set requirements refer to the standard test models, Data packet transfer sou
sdram_test
- 在vivado中用于测试SDRAM,DDR3学习比较有帮助-the testbench for ddr3
S27_SDRAM_IP
- SDRAM 驱动读写demo,用verilog写的上板测试过-SDRAM verilog
C5G_LPDDR2_RTL_Test
- 对SDRAM进行读写测试按下KEY0,将发送测试数据,LED1\2将常量,放开KEY0,LED1\2闪烁,大约25秒后,LED1常量,读写成功。-Read and write tests on the SDRAM press KEY0, will send test data, LED1 \ 2 will be constant, release KEY0, LED1 \ 2 flash, about 25 seconds later,