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crc16_ccitt
- crc_table.c is for reset seed( 0000 ) crc_table_1.c is for reset seed( ffff) CRC16_D8_m.v is a verilog module of byte paralle crc. CRC16_D8_m_tb.v is the testbench file of above module.
Poisson_MPI.f90
- 用MPI在fortran下 泊松方程的并行实现-with MPI in fortran under Poisson equation parallel
crc16_ccitt
- crc_table.c is for reset seed( 0000 ) crc_table_1.c is for reset seed( ffff) CRC16_D8_m.v is a verilog module of byte paralle crc. CRC16_D8_m_tb.v is the testbench file of above module. -crc_table.c is for reset se
SIPO
- Filo Serial-Input to Paralle-output
2
- paralle computing with MPI
ForOpenMP
- 使用OpenMP开发并行程序,这是一个简单的例子，供初学者参考-use OpenMP to develop paralle program
usb
- USBExpander to replace paralle port
transpose_me
- this abou MPI implementation in paralle processing.an example of transpose matrix-this is abou MPI implementation in paralle processing.an example of transpose matrix
fakhar
- this about linda parallel model in paralle procesing-this is about linda parallel model in paralle procesing
Level.surface.paralle.calculation.corrections
- 水准面不平行性改正数的计算Level surface is not parallel to the calculation of corrections -Level surface is not parallel to the calculation of corrections
s_to_p
- serial to paralle a vhdl code
Paralle
- 非常棒的BOOK,相信你肯定会喜欢的,, 喜欢的来顶下吧-very good book
hypercube_array_sum
- MPI paralle c code for hypercube array sum
FLASH_S29GL128P11FFI010_128Mbit
- 并口Flash，S29GL128P11FFI010_128Mbit-paralle interface Flash，S29GL128P11FFI010_128Mbit
Matrix_Multi
- This a source code of Matrix of Paralle-This is a source code of Matrix of Paralle
Behind-Two-Point-parfor_progress
- 方便观察并行运算采用parfor（并行循环）时的运算进程，一个简化版的进度条，比具有GUI的进度节省不少珍贵的电脑资源。本程序根据网上parfor_progress的源程序改编而，但显示到小数点后2为的精确进度情况，比网上的灵敏度更高。-It convenience for us to observe the operation process when we use Parallel Algorithmic parfor(parall
AD9850-Program-with-C51
- DDS9850的单片机开发程序,利用C51编程，显示屏并行接口。-DDS9850 program, used c51 language ,LCD link with MCU paralle interface.
network_coding_simulation-master2015
- 此版本与6-1不同之处在于，节点之间的传输不再采用swap形式，而只是单向传输。 特别地，度为1的码包，在传输1跳之后就不再传输。因为当前节点会判定其已经完成编码。 如果想让它传输log(N)跳，则修改判定编码完成的条件。 主要特点： 为并行计算而设计。不使用全局变量。(# network_coding_simulation Simulation platform based on matlab. Only able to