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Quartus
- 上传一份cpld 开发工具,Quartus II 中文教程.pdf,供学习参考。
Quartus II 交通灯课程设计(成功版)
- 这是一个由Quartus II 运行的交通灯课程设计,正在学习的朋友可以下载来看看。
Quartus接收机开发
- 直接扩频接收机设计的Quartus源代码,非常有价值的硬件实现电路
用Quartus II对状态机进行功能仿真和时序仿真
- 用Quartus II对状态机进行功能仿真和时序仿真,不需要编写测试向量。文档附详细的操作步骤。
Quartus II chinese
- TCP或UDP协议通信-TCP or UDP communications
sopc
- altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
shifter
- 用vhdl实现双向移位寄存器 仿真环境MAXPLUS-II,QUARTUS--bidirectional use VHDL simulation environment shift register Segments-II, QUARTUS-
100个vhdl设计例子
- 内附多路选择器,74系列芯片VHDL源码,加法器,FIR,比较器等大量例子,对初学VHDL语言很有好处。可用maxplus,quartus,synplicity等综合软件进行调试-contains multiple-choice, 74 chips VHDL source code, the adder, FIR, comparators, etc. are plenty of examples for beginners VHDL v
intro_to_quartus2_chinese
- 介绍quartus II 汉语教程,非常难得,-A Chinese introduction to quartus II.
LCD显示实验
- ALTERA NIOS处理器,用VHDL在QUARTUS下编写,用NIOS SHELL调试通过,实验LCD液晶显示-Altera NIOS processor, using VHDL in QUARTUS prepared with NIOS SHELL debug through experimental LCD
SRAM@DMA实验
- ALTERA NIOS处理器实验,QUARTUS下用VHDL编译成处理器,然后NIOS SHELL下C 语言运行。实验SRAM和DMA调度-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling
memoire_alphabet
- ALTERA NIOS处理器实验,QUARTUS下用VHDL编译成处理器。实现memory存储。-Altera NIOS processor experiments QUARTUS using VHDL compiler into processors. Achieving memory storage.
fpga 和 cpld入门教程
- 本教程定位于FPGA/CPLD的快速入门。以ALTERA公司的芯片和相应的开发软件为目标载体进行阐述,本教程阐述了ALTERA主要系列芯片PLD芯片的结构和特点以及相应的开发软件MAX和Plusa和Quartus的使用-position in the handbook FPGA/CPLD Quick Start. With Altera's chips and the corresponding development of s
key_scan1
- 用verilog实现的四乘四键盘程序,在Quartus II上编译通过并成功-achieved using Verilog 4 x 4 keyboard procedures, the Quartus II compiler on the adoption and successful
signalgenerater
- 一个简单的多种信号的发生器 包括正玄,锯齿,阶梯等,使用时用quartus 4.0以上版本打开-a simple multiple signal generator including Shogen, sawtooth, the ladder, when used with the above version 4.0 Quartus open
VHDL_processor
- 利用VHDL语言描述的一个简单微处理器,可以通过修改源码来调整指令集,可以在Quartus II上直接运行和编译.-use VHDL descr iption of a simple microprocessor, can modify the source codes to adjust instruction set, Quartus II can be directly compiled and running.
VHDL-Clock
- 用VHDL语言写的时钟程序。采用模块化编程。可在EPM7128芯片上下载。编译环境可用Maxplus或Quartus。-write VHDL clock procedures. Modular programming. The EPM7128 chips download. Build environment or Quartus Maxplus available.
ref-ualaw
- A率/u率 压缩与解压缩的IP核,。 # 由AHDL语言写成,可在MaxplusII和QuartusII中使用,源代码加密。-A rate/u rate compression and decompression of the IP core,. By AHDL# languages, and the Quartus II MaxplusII use, the source code encryption.
quartus_Chinese_Introduction
- quartus 软件应用中文教程,包含一些高级的用法等。-quartus Chinese Directory software applications, including some senior usage, and so on.
intro_to_quartus2_v6.0_chinese
- quartus II 6.0 中文使用手册 intro_to_quartus2_chinese-Chinese quartus II 6.0 manual intro_to_quartus2_ english