搜索资源列表
rom
- 生成rom的代码-The code generated rom.。。。。。。。。。。。
31-x-8-ROM-master
- Verilog module for a ROM. The rom needs to be able to hold 32 unsigned Integers each 8 Bits. Thus it must have32 address lines.
ROM-with-I2C
- This code in C language is a source code for interfacing of 8051 uC with ROM , storing data in ROM and then displaying it on LCD after reading it
ROM
- 使用verilog语言实现对altera下cycloneII系列FPGA的片上ROM的创建，读写，调用IP核-Use verilog language to achieve altera under the cycloneII series FPGA on-chip ROM to create, read and write, call IP core
blockRomTest
- it is a rom with vhdl
BlueCore6-ROM-Module
- BlueCore6-ROM-Module.zip Opendous Inc.'s OpenHardware designs that are designed and developed using Free and Open Source Software.
ROM_test
- 使用quartus调用ROM的IP核，并生成激励文件进行仿真(Use the quartus call ROM IP kernel, and generate incentive files for simulation.)
11_rom_test
- 利用.mif文件产生rom表。完成rom的存储和读取(Using the.Mif file to generate the ROM table. Complete the storage and read of ROM)
TesteROM
- ROM Test - VHDL Project
ENGNBLD
- rom placa engine KM 5050 for bootable flash memory rewriting.
4PDA dz09 Dizbakterioz
- Rom for smart watch DZ-09 4mb
4PDA dz09 effor555
- Rom for smart watch DZ-09 eff0r555
10_rom_test
- rom ip核的配置，以及测试文件，适合初学者使用。(ROM IP core configuration, as well as test files, suitable for beginners to use.)
4PDA dz09 buzifal
- ROM FOR DZ09 32 VERSION
串口读取rom—lcd显示程序
- 1602显 示ds18b20内 部rom(1602 display DS18B20 internal ROM)
rom_test
- rom读写实验，实现FPGA内部rom数据存取(rom read and write,this is a good document for study FPGA verilog)
basic verilog codes
- Basic Verilog code includes RING and Johnson counters, Up-down counters, RAM, ROM, SIPO, PISO, SISO, PIPO, Mealy and Moore FSM codes
10_rom_test
- 讲解赛灵思Spartant_6系列FPGA的ROM IP核的调试过程，供大家参考学习(Explain Xilinx Spartant_6 Series FPGA ROM IP core debugging process, for your reference learning)
WD Write Rom
- PC3000 WD write rom.
rom-0
- Rom 0 extracted from decoder