搜索资源列表
lcd_zifu
- 字符型液晶显示屏的完整程序,用Verilog编写,是FPGA设计中不可缺的一个环节-Character LCD display complete program written with Verilog, FPGA design is an essential part of
farrow
- 一份很好的数字时延程序(采用farrow算法),采用Verilog HDL,经过测试通过,是我一个雷达项目中的代替模拟时延的。精度很高,并有MATLAB程序验证-A good digital delay, Verilog HDL, procedures, is my test through a radar simulation project instead of the delay. Precision is high, and M
pid_controler_latest.tar
- PID控制器的verilog实现,做闭环控制器的人可以参考-PID controller verilog implementation of closed-loop controller may make reference to
FPGA_drive_VGA_test_verilog
- FPGA drive VGA test verilog
ddr2_test
- 一个用Verilog写的DDR2的控制器(我们项目是在Altera的FPGA)成功仿真,并且使用到了项目中控制DDR2-A written using Verilog DDR2 controller (our project in Altera' s FPGA) successful simulation, and used to control the DDR2 in project
SRAM
- FPGA控制SRAM的VERILOG源码-The VERILOG source code control SRAM FPGA
i2c
- fpga verilog I2c 和 用以DSP mcbsp程序,测试过了-fpga verilog I2c and for the DSP mcbsp procedures, tested the
jianpan
- 基于FPGA的Verilog的控制PS2数字小键盘并在数码管显示相应的数字-Verilog FPGA based control of PS2 numeric keypad and digital display the corresponding number
uart_EP3C16_FIFO
- Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
verilogadc0809
- verilog adc0809控制器FPGA实现,编译通过,系统时钟分频,满足ADC时钟要求。-verilog adc0809 controller FPGA, compiler, system clock frequency to meet the requirements of ADC clock.
AD_sample_100Mhz
- 用Verilog编写的FPGA AD采样 用Verilog编写的FPGA AD采样-AD_sample_100Mhz
XilinxFPGA(1-60)
- 系统地讲述了Xilinx FPGA的开发知识,包括FPGA开发简介,Verilog HDL语言基础、基于Xilinx芯片的HDL语言高级进阶、ISEd开发环境使用指南等-Systematically describes the development of Xilinx FPGA knowledge, including Introduction to FPGA development, Verilog HDL language bas
Verilog
- 基于fpga开发大量事例以及基础实验-fpga
verilog_DA_TLC5615
- verilog 写的硬件示波器设计检测频率为1K~10KHz-verilog 1K~10KHz test
SDRAM
- FPGA SDRAM控制器Verilog源码,通过测试-FPGA SDRAM VERILOG
8051core-Verilog
- 基于FPGA的8051MCU的设计与实现-FPGA-Based Design and Implementation of 8051MCU
saa7113
- 次程序为基于FPGA的对SAA7113的串口控制程序,其中使用的是I2C总线传输数据。语言为VERILOG-Second program FPGA-based serial port of the SAA7113 control program, which is I2C bus used to transfer data. Language VERILOG
UART
- 语言:verilog语言 功能:通过串口控制模块,实现FPGA与串口 通信。 仿真环境:modelsim 综合环境:quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim
SRAM
- 语言:VHDL 功能:利用VHDL编程,实现FPGA对SRAMIS61LV24516的读写操作。由于是针对IS61LV24516型号进行读写的,如果不是此型号的SRAM需要对程序进行时序修改。 仿真工具:modelsim 综合工具:quartus -Language: VHDL function: the use of VHDL programming, FPGA on SRAMIS61LV24516 read and
keyscan
- verilog语言 4X4键盘扫描 适合于FPGA、verilog语言的初学者 功能模块分块有条理,清晰。帮助初学者掌握FPGA的分层设计-verilog language; 4X4 keyboard scan for FPGA, verilog language modules for beginners ;block structured and clear. Help beginners master the h