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cicmodule
- 一个3阶的CIC内插滤波器，可作为delta sigma DAC升采样率模块，用于半带滤波器后。-a three bands CIC interpolation filter, as delta sigma DAC sampling rate or module for the half-band filter.
CIC滤波器的补偿
- CIC滤波器的补偿，适用于抽取内插滤波器的设计
cicmodule
- 一个3阶的CIC内插滤波器，可作为delta sigma DAC升采样率模块，用于半带滤波器后。-a three bands CIC interpolation filter, as delta sigma DAC sampling rate or module for the half-band filter.
Chapter_3
- 包括内插，还有成形滤波器等等调制时所用的matlab文件-Including interpolation, as well as shaping filter modulation, etc. used by the matlab file
cic
- verilog码写的CIC滤波器的程序，包括4倍抽取CIC滤波器和内插的CIC滤波器两个-Verilog code written by CIC filter procedures, including 4 times the extraction CIC filter and the CIC interpolation filter two
CICFilterDesignandAnalysisinMultipleSampling
- 首先介绍了内插理论和CIC 滤波器原理,重点给出了CIC 滤波器设计方法,并分析了CIC 滤波器级联级数 和滤波器阶数的选取对通带衰减和旁瓣抑制的影响,仿真结果验证了设计方法的有效性和可行性。-First introduced the theory and CIC interpolation filter, the focus is given CIC filter design methods, and analyzes the
cic1s2
- 单级CIC2倍内插滤波器，用verilogHDL实现-CIC2 times the single-stage interpolation filter, used to achieve verilogHDL
wholework
- 内插滤波器，，产生一个周期>255随机BPSK{-1，+1}信号序列-Interpolation filter, and produce a cycle of
matlabfiltercode
- 用matlab是实现半带抽取、半带内插滤波器，以及fft变换，CIC等等。-Using matlab to achieve half-band extraction, half-band interpolation filter, as well as the fft transform, CIC, etc..
ciccomp
- CIC滤波器的补偿，适用于抽取内插滤波器的设计，写昂对大家有用-CIC compensation filter, applied to extract the design of interpolation filters, write Aung useful for everyone
upsampex
- 上采样和内插，使得系统中同时出现的窄带信号和宽带信号能够采用适合本信号的采样率-On sampling and interpolation, making the system at the same time, the narrowband signals and broadband signals can be used for the signal sampling rate
myCICv1_fir_comp_coeff
- 利用matla设计的CIC内插滤波器，其中包含了其相应的补偿滤波器。-Matla designed using CIC interpolation filters, which contains the corresponding compensation filter.
Modulation_Demodulation_8PSK_FPGA
- 基于8PSK的调制解调，中间还有滤波器，内插器，正交调制-Based on 8PSK modulation and demodulation of the middle there are filters, interpolation, and quadrature modulation
half_band_2
- 设计一个半带滤波器，将信号进行2倍内插后进行滤波。-design a half band filter. twice frequence and then filter.
ruan
- 扩频发射机，信道编码采用(2, 1, 7)卷积 码, 扩频模块采用扩频长度255 的kasami码, 极性变换模块为3bit 量化模式, 内插模块为每两比特间插入7bit 和输出滤波为16 阶的FIR 滤波器。-direct sequence spread spectrum transmitter
baseband_verilog
- verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器-verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolu
cic_intp_64_four
- 4阶CIC内插滤波器，内插系数64，Verilog版本，数字下变频-4-order interpolating CIC filter interpolation factor of 64, Verilog version of the digital down-conversion
lagrange
- 抛物线型拉格朗日内插滤波器的实现，MATLAB程序-Parabolic Lagrange interpolation filters are implemented, MATLAB program
interpolation_FIR
- 内插滤波器interpolation filter的范例~很实用~-interpolation filter
InterSpec
- 1）产生信号、抽样、整数倍内插、幅频分析 2）计算不同阶数和级数阻带和通带误差(1) produce a signal 2) sampling 3) integer interpolation 4) amplitude frequency analysis)