[VHDL编程] EPM3032

说明：EPM3032上使用quartus5.0编写的verilog程序，用于单片机译码并驱动外设之用。-A verilog program used for embeded cpu encode and drive pheripha chip,platform is quartus5.0
<普云忠> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] ADtest

说明：FPGA与ADS822通信，控制ADS822采集波形，并通过DA输出显示-FPGA communicates with ADS822, control ADS822 waveform acquisition and output display by DA
<lixing> 在 2025-06-02 上传 | 大小：1kb | 下载：1

[VHDL编程] AD_TLC549

说明：FPGA控制AD芯片TLC549采集信号，-TLC549 AD chip FPGA control signal acquisition,
<lixing> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] COMB

说明：We use port map statement to achieve the structural model (components instantiations). The following example shows how to write the program to incorporate multiple components in the design of a more complex circuit. In o
<sam> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] CALIBRATION

说明：Calibration is a comparison between measurements – one of known magnitude or correctness made or set with one device and another measurement made in as similar a way as possible with a second device. The device with the
<GOPALAKRISHNAN E> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] Projects

说明：this is sub and adder in vhdl &writed in ISE
<mohammad> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] Array-multiplier

说明：Array muiltiplier verilog code.. 4 bit two inputs with 8 bit outputs
<Prashanth R> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] pid

说明：pid controller design based vhdl code in xilinx code-pid controller design based vhdl code in xilinx code.....................
<GOPALAKRISHNAN E> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] pwm_auto

说明：PWM for VHDL program
<khefin> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] verilog_receiver

说明：标准的verilog rs232 接收功能通讯源码，测试可用，已经在实际系统开发中使用。-Standard verilog rs232 reception communications source, testing is available, have been used in the actual system development.
<111111> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] counter_vhd

说明：An asynchronous (ripple) counter is a single d-type flip-flop, with its J (data) input fed its own inverted output. This circuit can store one bit, and hence can count zero to one before it overflows (starts over 0). Thi
<GOPALAKRISHNAN E> 在 2025-06-02 上传 | 大小：1kb | 下载：0

[VHDL编程] counter_vhd

说明：Counter is used to count the value of the memory register in the digital circuits-Counter is used to count the value of the memory register in the digital circuits....
<GOPALAKRISHNAN E> 在 2025-06-02 上传 | 大小：1kb | 下载：0