[VHDL编程] sqrtcsla

说明：Carry select adder using square root method.
<MITUN> 在 2025-06-22 上传 | 大小：3.6mb | 下载：0

[VHDL编程] Stage_I

说明：FPGA SPDS for bioimpedance computing
<Shreeyog Nimkar> 在 2025-06-22 上传 | 大小：385kb | 下载：0

[VHDL编程] VmodCAM_Ref_VGA-Demo_13

说明：VmodCam sample, only works with ISE13
<angel21> 在 2025-06-22 上传 | 大小：782kb | 下载：0

[VHDL编程] Pipeline_cpu

说明：this file contain descr iption of cpu in VHDL language that implies pipeline fetching.
<babak aghaei> 在 2025-06-22 上传 | 大小：2kb | 下载：0

[VHDL编程] modeling-pojects

说明：this compressed file basically contains 5 type of cpu simulations in VHDL code. 1. basic cpu 2. pipelin cpu 3. parwan 4. j1 and j2 cpus 5. j1 and j2 with JTSG port
<babak aghaei> 在 2025-06-22 上传 | 大小：19kb | 下载：1

[VHDL编程] descode

说明：Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorit
<akram> 在 2025-06-22 上传 | 大小：5kb | 下载：0

[VHDL编程] tcdg

说明：Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorit
<akram> 在 2025-06-22 上传 | 大小：5kb | 下载：0

[VHDL编程] test-des

说明：Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorit
<akram> 在 2025-06-22 上传 | 大小：5kb | 下载：0

[VHDL编程] min_max_finder_part3_M4

说明：给定一组数据，从这一组数据中找出他们的最大值和最小值-to get the maximam and minimam of a series of numbers
<czd> 在 2025-06-22 上传 | 大小：1kb | 下载：0

[VHDL编程] Verilog-testbench-and-memory-I2C

说明：verilog编写的测试平台，内含具体project和储存模块的编写-Verilog testbench for digital design Memory I2C module Assignment
<ligang> 在 2025-06-22 上传 | 大小：473kb | 下载：0

[VHDL编程] DELAY

说明：一个用元件实现的延时例程，通过这个例程可以学习元件的使用和简单的计数器延时的编程方法。-A delay routine use components to achieve through this routine can learn to use the elements and simple programming counter delay
<xuegamgma> 在 2025-06-22 上传 | 大小：222kb | 下载：0

[VHDL编程] textio03

说明：在QUARTUS II 下用 MODELSIM 仿真的例子，用TEXTIO文件进行仿真，带读取数据的文本文件，注释也比较详尽。对初学仿真有帮助。-In QUARTUS II with MODELSIM simulation examples, simulation with TEXTIO file, a text file with read data, comments are more detailed. Simulation helpful for beginners.
<xuegamgma> 在 2025-06-22 上传 | 大小：319kb | 下载：0