文件名称:一些有用的IP核
- 所属分类：
- 嵌入式/单片机编程
- 资源属性：
- [C/C++] [源码]
- 上传时间：
- 2010-11-02
- 文件大小：
- 882.21kb
- 下载次数：
- 1次
- 提 供 者：
- luckyzjian
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
包含FIFO,LUT,SPMEM,DPMEM,SDRAM等常用IP核
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : IP核.rar 列表 memory_cores2\CVS\Entries memory_cores2\CVS\Repository memory_cores2\CVS\Root memory_cores2\dpmem\core\CVS\Entries memory_cores2\dpmem\core\CVS\Repository memory_cores2\dpmem\core\CVS\Root memory_cores2\dpmem\core\dpmem.vhd memory_cores2\dpmem\core\WB_dpmem.vhd memory_cores2\dpmem\CVS\Entries memory_cores2\dpmem\CVS\Repository memory_cores2\dpmem\CVS\Root memory_cores2\fifo\core\CVS\Entries memory_cores2\fifo\core\CVS\Repository memory_cores2\fifo\core\CVS\Root memory_cores2\fifo\core\fifo.vhd memory_cores2\fifo\CVS\Entries memory_cores2\fifo\CVS\Repository memory_cores2\fifo\CVS\Root memory_cores2\fifo\scripts\build_fifo.csh memory_cores2\fifo\scripts\CDS.LIB memory_cores2\fifo\scripts\CVS\Entries memory_cores2\fifo\scripts\CVS\Repository memory_cores2\fifo\scripts\CVS\Root memory_cores2\fifo\tb\CVS\Entries memory_cores2\fifo\tb\CVS\Repository memory_cores2\fifo\tb\CVS\Root memory_cores2\fifo\tb\fifo_tb.vhd memory_cores2\libs\CVS\Entries memory_cores2\libs\CVS\Repository memory_cores2\libs\CVS\Root memory_cores2\libs\memLib\CVS\Entries memory_cores2\libs\memLib\CVS\Repository memory_cores2\libs\memLib\CVS\Root memory_cores2\libs\memLib\mem_pkg.vhd memory_cores2\libs\tools_pkg.vhd memory_cores2\lut\CVS\Entries memory_cores2\lut\CVS\Repository memory_cores2\lut\CVS\Root memory_cores2\lut\lut.vhd memory_cores2\spmem\core\CVS\Entries memory_cores2\spmem\core\CVS\Repository memory_cores2\spmem\core\CVS\Root memory_cores2\spmem\core\spmem.vhd memory_cores2\spmem\core\WB_spmem.vhd memory_cores2\spmem\CVS\Entries memory_cores2\spmem\CVS\Repository memory_cores2\spmem\CVS\Root pci_core\Blocks\CVS\Entries pci_core\Blocks\CVS\Repository pci_core\Blocks\CVS\Root pci_core\Blocks\pci_parity.vhd pci_core\CVS\Entries pci_core\CVS\Repository pci_core\CVS\Root pci_core\diagrams\CVS\Entries pci_core\diagrams\CVS\Repository pci_core\diagrams\CVS\Root pci_core\diagrams\pci.dia pci_core\TestBench\CVS\Entries pci_core\TestBench\CVS\Repository pci_core\TestBench\CVS\Root pci_core\TestBench\pci_parity_tb.vhd pci_core\vhdl_behav\CVS\Entries pci_core\vhdl_behav\CVS\Repository pci_core\vhdl_behav\CVS\Root pci_core\vhdl_behav\Ms32pci.vhd pci_core\vhdl_behav\PCI.CMD pci_core\vhdl_behav\Pci_lib.vhd pci_core\vhdl_behav\readme.txt pci_core\vhdl_behav\Test_pci.vhd pci_core\vhdl_behav\Tg32pci.vhd sdram_ctrl\CVS\Entries sdram_ctrl\CVS\Repository sdram_ctrl\CVS\Root sdram_ctrl\doc\CVS\Entries sdram_ctrl\doc\CVS\Repository sdram_ctrl\doc\CVS\Root sdram_ctrl\doc\readme.txt sdram_ctrl\doc\sdram_ctrl.sxw sdram_ctrl\src\CVS\Entries sdram_ctrl\src\CVS\Repository sdram_ctrl\src\CVS\Root sdram_ctrl\src\sdram_ctrl.vhd sdram_ctrl\syn\CVS\Entries sdram_ctrl\syn\CVS\Repository sdram_ctrl\syn\CVS\Root sdram_ctrl\syn\sdram_ctrl\cb_generator.pl sdram_ctrl\syn\sdram_ctrl\class.ptf sdram_ctrl\syn\sdram_ctrl\CVS\Entries sdram_ctrl\syn\sdram_ctrl\CVS\Repository sdram_ctrl\syn\sdram_ctrl\CVS\Root sdram_ctrl\syn\sdram_ctrl\hdl\CVS\Entries sdram_ctrl\syn\sdram_ctrl\hdl\CVS\Repository sdram_ctrl\syn\sdram_ctrl\hdl\CVS\Root sdram_ctrl\syn\sdram_ctrl\hdl\sdram_ctrl.vhd sdram_ctrl\test_bench\cpu_simulator.vhd sdram_ctrl\test_bench\CVS\Entries sdram_ctrl\test_bench\CVS\Repository sdram_ctrl\test_bench\CVS\Root sdram_ctrl\test_bench\mt48lc4m32b2.vhd sdram_ctrl\test_bench\old\Count_Binary_sdram_0.dat sdram_ctrl\test_bench\old\cpu_simulator_file_based.vhd sdram_ctrl\test_bench\old\CVS\Entries sdram_ctrl\test_bench\old\CVS\Repository sdram_ctrl\test_bench\old\CVS\Root sdram_ctrl\test_bench\old\Hello_LED_sdram_0.dat sdram_ctrl\test_bench\old\nios.dat sdram_ctrl\test_bench\pll.vhd sdram_ctrl\test_bench\sdram_ctrl_tb.vhd usb11\bench\CVS\Entries usb11\bench\CVS\Repository usb11\bench\CVS\Root usb11\bench\systemc\CVS\Entries usb11\bench\systemc\CVS\Repository usb11\bench\systemc\CVS\Root usb11\bench\systemc\README usb11\bench\systemc\usb_8051_test.cpp usb11\bench\systemc\usb_ocp_test.cpp usb11\bench\verilog\CVS\Entries usb11\bench\verilog\CVS\Repository usb11\bench\verilog\CVS\Root usb11\bench\verilog\README usb11\bench\verilog\tests.v usb11\bench\verilog\tests_lib.v usb11\bench\verilog\tests_ocp.v usb11\bench\verilog\test_bench_8051_top.v usb11\bench\verilog\test_bench_ocp_top.v usb11\bench\verilog\usb_defines.v usb11\CVS\Entries usb11\CVS\Repository usb11\CVS\Root usb11\doc\CVS\Entries usb11\doc\CVS\Repository usb11\doc\CVS\Root usb11\doc\ep0_rtl.pdf usb11\doc\phy_rtl.pdf usb11\doc\sie_rtl.pdf usb11\doc\usb_rtl.pdf usb11\doc\usb_testbench.pdf usb11\rtl\CVS\Entries usb11\rtl\CVS\Repository usb11\rtl\CVS\Root usb11\rtl\systemc\CVS\Entries usb11\rtl\systemc\CVS\Repository usb11\rtl\systemc\CVS\Root usb11\rtl\systemc\fifo_test.cpp usb11\rtl\systemc\Makefile usb11\rtl\systemc\Makefile.defs usb11\rtl\systemc\Makefile.usb_8051 usb11\rtl\systemc\phy_test.cpp usb11\rtl\systemc\README usb11\rtl\systemc\rom_test.cpp usb11\rtl\systemc\rx_test.cpp usb11\rtl\systemc\tx_test.cpp usb11\rtl\systemc\usb.h usb11\rtl\systemc\usb.out usb11\rtl\systemc\usb_8051_test.cpp usb11\rtl\systemc\usb_core.cpp usb11\rtl\systemc\usb_core.h usb11\rtl\systemc\usb_crc16.cpp usb11\rtl\systemc\usb_crc16.h usb11\rtl\systemc\usb_crc