文件名称:8051Verilog
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利用FPGA可编程的特点，在内部编写了一个8051单片机软核。已通过调试。-The use of FPGA programmable features, in-house preparation of a 8051 soft-core. Passed debugging.
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下载文件列表
8051Verilog\1239505097.jpg
...........\Acc.v
...........\All.v
...........\Alu.v
...........\alu_src1_sel.v
...........\alu_src2_sel.v
...........\alu_src3_sel.v
...........\Comp.v
...........\cy_select.v
...........\Decoder.v
...........\Defines.v
...........\Divide.v
...........\Dptr.v
...........\ext_addr_sel.v
...........\immediate_sel.v
...........\IndiAddr.v
...........\Make
...........\Multiply.v
...........\op_select.v
...........\Pc.v
...........\Port_out.v
...........\Psw.v
...........\Ram.v
...........\ram_rd_sel.v
...........\Ram_sel.v
...........\ram_wr_sel.v
...........\Reg1.v
...........\Reg2.v
...........\Reg3.v
...........\Reg4.v
...........\Reg5.v
...........\Reg8.v
...........\Reg8r.v
...........\Rom.v
...........\rom_addr_sel.v
...........\Sp.v
...........\Tb_all.v
...........\transcript
8051Verilog
...........\Acc.v
...........\All.v
...........\Alu.v
...........\alu_src1_sel.v
...........\alu_src2_sel.v
...........\alu_src3_sel.v
...........\Comp.v
...........\cy_select.v
...........\Decoder.v
...........\Defines.v
...........\Divide.v
...........\Dptr.v
...........\ext_addr_sel.v
...........\immediate_sel.v
...........\IndiAddr.v
...........\Make
...........\Multiply.v
...........\op_select.v
...........\Pc.v
...........\Port_out.v
...........\Psw.v
...........\Ram.v
...........\ram_rd_sel.v
...........\Ram_sel.v
...........\ram_wr_sel.v
...........\Reg1.v
...........\Reg2.v
...........\Reg3.v
...........\Reg4.v
...........\Reg5.v
...........\Reg8.v
...........\Reg8r.v
...........\Rom.v
...........\rom_addr_sel.v
...........\Sp.v
...........\Tb_all.v
...........\transcript
8051Verilog