文件名称:FPGA_DDS
介绍说明－－下载内容均来自于网络，请自行研究使用
FPGA中实现信号发生器,即DDS,代码简洁,精练,非常适合学习,已经经过验证.-The FPGA signal generator, or DDS, the code simple, concise, very suitable for learning, has been verified.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
FPGA_DDS
........\cmp_state.ini
........\ctrlDuty.v
........\db
........\..\altsyncram_mrc1.tdf
........\..\altsyncram_peg1.tdf
........\..\dds.asm.qmsg
........\..\dds.asm.rdb
........\..\dds.asm_labs.ddb
........\..\dds.cbx.xml
........\..\dds.cmp.cdb
........\..\dds.cmp.hdb
........\..\dds.cmp.kpt
........\..\dds.cmp.logdb
........\..\dds.cmp.rdb
........\..\dds.cmp.tdb
........\..\dds.cmp0.ddb
........\..\dds.cmp2.ddb
........\..\dds.db_info
........\..\dds.eco.cdb
........\..\dds.fit.qmsg
........\..\dds.hier_info
........\..\dds.hif
........\..\dds.lpc.html
........\..\dds.lpc.rdb
........\..\dds.lpc.txt
........\..\dds.map.cdb
........\..\dds.map.hdb
........\..\dds.map.logdb
........\..\dds.map.qmsg
........\..\dds.pre_map.cdb
........\..\dds.pre_map.hdb
........\..\dds.rtlv.hdb
........\..\dds.rtlv_sg.cdb
........\..\dds.rtlv_sg_swap.cdb
........\..\dds.sgdiff.cdb
........\..\dds.sgdiff.hdb
........\..\dds.sld_design_entry.sci
........\..\dds.sld_design_entry_dsc.sci
........\..\dds.smart_action.txt
........\..\dds.smp_dump.txt
........\..\dds.syn_hier_info
........\..\dds.tan.qmsg
........\..\dds.tis_db_list.ddb
........\..\dds.tmw_info
........\..\logic_util_heursitic.dat
........\dds.asm.rpt
........\dds.done
........\dds.fit.rpt
........\dds.fit.smsg
........\dds.fit.summary
........\dds.flow.rpt
........\dds.map.rpt
........\dds.map.summary
........\dds.pin
........\dds.pof
........\dds.qpf
........\dds.qsf
........\dds.qws
........\dds.sof
........\dds.tan.rpt
........\dds.tan.summary
........\dds.v
........\dds.vwf
........\dds_assignment_defaults.qdf
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\dds.root_partition.map.kpt
........\..............\README
........\memTable.v
........\setR.v
........\statMac.v
........\transAddr.v
........\说明.txt
........\cmp_state.ini
........\ctrlDuty.v
........\db
........\..\altsyncram_mrc1.tdf
........\..\altsyncram_peg1.tdf
........\..\dds.asm.qmsg
........\..\dds.asm.rdb
........\..\dds.asm_labs.ddb
........\..\dds.cbx.xml
........\..\dds.cmp.cdb
........\..\dds.cmp.hdb
........\..\dds.cmp.kpt
........\..\dds.cmp.logdb
........\..\dds.cmp.rdb
........\..\dds.cmp.tdb
........\..\dds.cmp0.ddb
........\..\dds.cmp2.ddb
........\..\dds.db_info
........\..\dds.eco.cdb
........\..\dds.fit.qmsg
........\..\dds.hier_info
........\..\dds.hif
........\..\dds.lpc.html
........\..\dds.lpc.rdb
........\..\dds.lpc.txt
........\..\dds.map.cdb
........\..\dds.map.hdb
........\..\dds.map.logdb
........\..\dds.map.qmsg
........\..\dds.pre_map.cdb
........\..\dds.pre_map.hdb
........\..\dds.rtlv.hdb
........\..\dds.rtlv_sg.cdb
........\..\dds.rtlv_sg_swap.cdb
........\..\dds.sgdiff.cdb
........\..\dds.sgdiff.hdb
........\..\dds.sld_design_entry.sci
........\..\dds.sld_design_entry_dsc.sci
........\..\dds.smart_action.txt
........\..\dds.smp_dump.txt
........\..\dds.syn_hier_info
........\..\dds.tan.qmsg
........\..\dds.tis_db_list.ddb
........\..\dds.tmw_info
........\..\logic_util_heursitic.dat
........\dds.asm.rpt
........\dds.done
........\dds.fit.rpt
........\dds.fit.smsg
........\dds.fit.summary
........\dds.flow.rpt
........\dds.map.rpt
........\dds.map.summary
........\dds.pin
........\dds.pof
........\dds.qpf
........\dds.qsf
........\dds.qws
........\dds.sof
........\dds.tan.rpt
........\dds.tan.summary
........\dds.v
........\dds.vwf
........\dds_assignment_defaults.qdf
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\dds.root_partition.map.kpt
........\..............\README
........\memTable.v
........\setR.v
........\statMac.v
........\transAddr.v
........\说明.txt