文件名称:RSIC_CPU2
介绍说明－－下载内容均来自于网络，请自行研究使用
这是一个用verilog编写的RSIC CPU模型，几个必要的模块都已经齐全，有兴趣的可以再完善更多的功能-This is a verilog written RSIC CPU model, several necessary modules are already complete, are interested in more features can be further improved
(系统自动生成,下载前可以参看下载内容)
下载文件列表
RSIC_CPU2\.lso
.........\accum.v
.........\addr_decode.prj
.........\addr_decode.stx
.........\addr_decode.v
.........\addr_decode.xst
.........\adr.v
.........\alu.v
.........\clk_gen.v
.........\counter.v
.........\cpu.bld
.........\cpu.cmd_log
.........\cpu.lso
.........\cpu.ncd
.........\cpu.ngc
.........\cpu.ngd
.........\cpu.ngr
.........\cpu.pad
.........\cpu.par
.........\cpu.pcf
.........\cpu.prj
.........\cpu.ptwx
.........\cpu.stx
.........\cpu.syr
.........\cpu.twr
.........\cpu.twx
.........\cpu.unroutes
.........\cpu.v
.........\cpu.xpi
.........\cpu.xst
.........\cpu_envsettings.html
.........\cpu_guide.ncd
.........\cpu_map.map
.........\cpu_map.mrp
.........\cpu_map.ncd
.........\cpu_map.ngm
.........\cpu_map.xrpt
.........\cpu_ngdbuild.xrpt
.........\cpu_pad.csv
.........\cpu_pad.txt
.........\cpu_par.xrpt
.........\cpu_summary.html
.........\cpu_summary.xml
.........\cpu_usage.xml
.........\cpu_xst.xrpt
.........\datactl.v
.........\iseconfig\cpu.xreport
.........\.........\RSIC_CPU2.projectmgr
.........\machine.v
.........\machinectl.v
.........\ram.prj
.........\ram.stx
.........\ram.v
.........\ram.xst
.........\register.v
.........\rom.prj
.........\rom.stx
.........\rom.v
.........\rom.xst
.........\RSIC_CPU2.gise
.........\RSIC_CPU2.xise
.........\test_CPU.v
.........\webtalk_pn.xml
.........\xlnx_auto_0_xdb\cst.xbcd
.........\.st\work\hdllib.ref
.........\...\....\vlg05\datactl.bin
.........\...\....\....9\accum.bin
.........\...\....\....A\alu.bin
.........\...\....\...10\counter.bin
.........\...\....\...29\register.bin
.........\...\....\...31\machine.bin
.........\...\....\....A\rom.bin
.........\...\....\...48\machinectl.bin
.........\...\....\...50\cpu.bin
.........\...\....\....F\adr.bin
.........\...\....\...62\addr__decode.bin
.........\...\....\....B\clk__gen.bin
.........\...\....\...74\ram.bin
.........\_ngo\netlist.lst
.........\.xmsgs\map.xmsgs
.........\......\ngdbuild.xmsgs
.........\......\par.xmsgs
.........\......\pn_parser.xmsgs
.........\......\trce.xmsgs
.........\......\xst.xmsgs
.........\xst\dump.xst\cpu.prj\ngx\notopt
.........\...\........\.......\...\opt
.........\...\........\.......\ngx
.........\...\........\cpu.prj
.........\...\work\vlg05
.........\...\....\vlg09
.........\...\....\vlg0A
.........\...\....\vlg10
.........\...\....\vlg29
.........\...\....\vlg31
.........\...\....\vlg3A
.........\...\....\vlg48
.........\...\....\vlg50
.........\...\....\vlg5F
.........\...\....\vlg62
.........\accum.v
.........\addr_decode.prj
.........\addr_decode.stx
.........\addr_decode.v
.........\addr_decode.xst
.........\adr.v
.........\alu.v
.........\clk_gen.v
.........\counter.v
.........\cpu.bld
.........\cpu.cmd_log
.........\cpu.lso
.........\cpu.ncd
.........\cpu.ngc
.........\cpu.ngd
.........\cpu.ngr
.........\cpu.pad
.........\cpu.par
.........\cpu.pcf
.........\cpu.prj
.........\cpu.ptwx
.........\cpu.stx
.........\cpu.syr
.........\cpu.twr
.........\cpu.twx
.........\cpu.unroutes
.........\cpu.v
.........\cpu.xpi
.........\cpu.xst
.........\cpu_envsettings.html
.........\cpu_guide.ncd
.........\cpu_map.map
.........\cpu_map.mrp
.........\cpu_map.ncd
.........\cpu_map.ngm
.........\cpu_map.xrpt
.........\cpu_ngdbuild.xrpt
.........\cpu_pad.csv
.........\cpu_pad.txt
.........\cpu_par.xrpt
.........\cpu_summary.html
.........\cpu_summary.xml
.........\cpu_usage.xml
.........\cpu_xst.xrpt
.........\datactl.v
.........\iseconfig\cpu.xreport
.........\.........\RSIC_CPU2.projectmgr
.........\machine.v
.........\machinectl.v
.........\ram.prj
.........\ram.stx
.........\ram.v
.........\ram.xst
.........\register.v
.........\rom.prj
.........\rom.stx
.........\rom.v
.........\rom.xst
.........\RSIC_CPU2.gise
.........\RSIC_CPU2.xise
.........\test_CPU.v
.........\webtalk_pn.xml
.........\xlnx_auto_0_xdb\cst.xbcd
.........\.st\work\hdllib.ref
.........\...\....\vlg05\datactl.bin
.........\...\....\....9\accum.bin
.........\...\....\....A\alu.bin
.........\...\....\...10\counter.bin
.........\...\....\...29\register.bin
.........\...\....\...31\machine.bin
.........\...\....\....A\rom.bin
.........\...\....\...48\machinectl.bin
.........\...\....\...50\cpu.bin
.........\...\....\....F\adr.bin
.........\...\....\...62\addr__decode.bin
.........\...\....\....B\clk__gen.bin
.........\...\....\...74\ram.bin
.........\_ngo\netlist.lst
.........\.xmsgs\map.xmsgs
.........\......\ngdbuild.xmsgs
.........\......\par.xmsgs
.........\......\pn_parser.xmsgs
.........\......\trce.xmsgs
.........\......\xst.xmsgs
.........\xst\dump.xst\cpu.prj\ngx\notopt
.........\...\........\.......\...\opt
.........\...\........\.......\ngx
.........\...\........\cpu.prj
.........\...\work\vlg05
.........\...\....\vlg09
.........\...\....\vlg0A
.........\...\....\vlg10
.........\...\....\vlg29
.........\...\....\vlg31
.........\...\....\vlg3A
.........\...\....\vlg48
.........\...\....\vlg50
.........\...\....\vlg5F
.........\...\....\vlg62