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数字锁相环
- PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿上；顶层文件是PLL.GDF-digital phase-locked loop PLL design source, in which Fi is the input frequency (receive data), Fo (Q5) i
Advanced Filter Design using MATLAB
- AFD - Advanced Filter Design using MATLABMiroslav D. Lutovac, Dejan V. Tosicversion 1.00 released 15 October 1999This program is freeware.Unpack with path names, for exampleDOS: pkunzip -d afdunix: unzip -L afdAfter unpa
基于遗传算法的FIR数字滤波器的优化设计
- 基于遗传算法的FIR数字滤波器的优化设计 设计IIR数字滤波器的遗传优化算法 caj图书-based on genetic algorithm FIR digital filter design optimization IIR digital filter design of genetic optimization algorithm CAJ books
毕业设计和实习管理平台
- 基于WEB的教学管理系统(毕业设计和实习管理平台)的论文-Web-based Education Management System (graduation design and practice management platform) papers
020833
- 这是个编译原理的课程设计，是一个DO-WHILE循环语句的翻译程序设计，包括词法分析，语法分析，生成中间代码四元式。-This is a compiler theory of curriculum design, is a DO-WHILE loop is the translation program design, including lexical analysis, grammar analysis, code generati
C++ programming design including data struct
- C++ programming design including data struct
DesignPatterns
- 设计模式的电子版 简明扼要 具有很好的参考价值-design electronic version of the model is a very good concise reference value
wave0001
- 在MAX-PLUS下设计的函数消耗发生器，波形有正弦波、方波、三角拨、锯齿波（用键盘选择），信号频率可调（用键盘调节）-the MAX-PLUS design of the consumption function generator, a sine wave, square, triangle area and Sawtooth (keyboard), in signal frequency adjustable (keyboard
lccsrc3.6
- c语言编译器，3.6版本 lcc version 3.x is described in the book "A Retargetable C Compiler: Design and Implementation" (Addison-Wesley, 1995, ISBN 0-8053-1670-1). There are significant differences between 3.x and 4.x, most n
5402_dsk_schem
- c54 dsk原理图,用于dsp tmsc54参考设计，使得用户可以在短时间内完成dsp系统的设计。建议大家学习学习，触类旁通-C54 DSK schematics, for dsp tmsc54 reference design enables the user to finish it in time DSP system design. Propose that we learn from, they jump
AT91x40 Series Board Design and Troubleshooting Gu
- AT91x40 Series Board Design and Troubleshooting Guide
305w
- 在线学习系统 v1.0 1.本系统采用学号加密码登录，可接受外部注册。 2.教学内容模块可由教师后台管理。 3.保存学生学习进度。 4.多种交互方式。 5.提供在线考试模块，同时能够进行补考，成绩查询等功能。 6.网页设计教学内容部分精心挑选，并进行了较好的分类。 学生测试帐号为:122005001 密码为:123 老师测试帐号为:teacher 密码为:123 -online learning syst
HRT-HOOD A Structured Design Method for Hard Real-
- 这篇论文描述了一种设计Hard Real Time System的结构方法HRT-HOOD，由York大学的两位教授提出，York大学的Real Time System Group是关于实时系统研究的世界领先机构，研究内容具体可以登陆York的网站，或者参考出版书籍：Real Time Systems and Programming Languages.-This paper describes a design Hard Real T
OS-DESIGN
- 在linux下使用c语言编写的一个文件拷贝的源码-the use of language c prepared a paper copy of the source code
Gracie DB Design
- java编写的数据库课程设计,一个电子商务网站的后台数据库设计,其中关系模型完整详尽,较好的页面设计,简洁美观,操作简易,源码易懂.-java database prepared by the curriculum design, and an e-commerce website of the background database design, which detailed model integrity, a better la
Game_AI
- 电脑游戏中的人工智能制作的文章收集。 搞游戏设计和编程的人都可以参考一下-computer game produced by the artificial intelligence collection article. Engage in game design and programming people can take a look
embedded_risc
- 一个嵌入式RISC CPU 的Verilog 设计源码，可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
simple_design_cpu
- 有是一个简单的cpu设计的开发过程！里面 有代码，和分析，设计过程！献给初学者的！-there is a simple design of the cpu development process! There are codes, and analysis, process design! Dedicated to beginners!
CPU_design
- 一个简单指令的cpu设计。 可以实现4个指令的的运算。-a simple instructions cpu design. 4 can be achieved directive arithmetic.
complexcpu_design
- 主要介绍一个很好的设计思想，介绍复杂cpu设计的框图。-introduces a very good design, introduced cpu design of complex diagram.