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polyphase
- The current portion of the collaboration has involved the feasibilty and implementation of a Polyphase Filter bank using various FPGAs and hardware architectures
Intro_to_VHDL
- Notes on VHDL (VHSIC Hardware Definition Language) A popular language for designing digital chips including FPGAs and CPLDs Notes on PERL, a popular scr ipting language-Notes on VHDL (VHSIC Hardware Definition La
VHDL_Style_Guide
- A style guide for VHDL, the popular hardware descr iptive language for the design/specification of ASICs, FPGAs and CPLDs ICs.-A style guide for VHDL, the popular hardware descr iptive language for the design/specificati
Synchronization_in_Software_Radios_in_FPGA
- This paper present the most common schemes of digital modulators and demodulators suitable for implementation on FPGAs
aips7108.tar
- SATA 仿真模型 SATA 仿真模型-Simulation Model SATA SATA SATA simulation model simulation model
Combinational_Divider_in_FPGA
- Three VHDL codes for combinational divider with implementation results for Xilinx Spartan FPGAs-Three VHDL codes for combinational divider with implementation results for Xilinx Spartan FPGAs
xapp1014_c5_GTP_SDI_RX
- Audio&Video Connectivity Solutions for Virtex-5 FPGAs
Xilinx_Altera_FPGAs
- Xilinx和Altera FPGAs的电源管理解决方案-Xilinx 和 Altera FPGAs power management solutions
FPGA-Channel-segmentation-design
- Channel segmentation design for symmetrical FPGAs.
Using_Embedded_Multipliers_in_Spartan-3_FPGAs
- 使用Spartan-3的嵌入式乘法器，VHDL语言-Using Embedded Multipliers in Spartan-3 FPGAs
tut_signaltapII_verilogDE2
- Altera公司原版设计手册，关于signaltap ii。-This tutorial explains how to use the SignalTap II feature within Altera’s Quartus R II software. The Signal- Tap II Embedded Logic Analyzer is a system-level debugging tool that ca
crossroute-R4
- As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstalk has primarily been a concern for
crossnoise-R5
- In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem affecting circuit reliability. Even t
0123744385NanometerFPGAs
- low power design of nanometer fpgas
HDL_Chip_Design
- HDL Chip Design --- A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog (EBook)
Rapid_System_Prototyping_with_FPGAs
- 《基于FPGA的快速建模》一本适合FPGA领域有一定基本经验读者的系统设计的佳作。-" FPGA-based rapid prototyping" a suitable FPGA has some basic experience in the field carry the tripod to make.
HighSpeedFIFOsInSpartan-IIFPGAs
- This application note describes how to build high-speed FIFOs using the Block SelectRAM+ memory in the Spartan™ -II FPGAs. Verilog and VHDL code is available for the design. The design is for a 512x8 FIFO, but e
proposal_arv
- this initial stages of research on how to target kalman filters to FPGAs-this is initial stages of research on how to target kalman filters to FPGAs
The-Speedy-DDR2-Controller-
- The Speedy DDR2 Controller For FPGAs ERSA 2009 Final
SATA-Connectivity-solutions-for-Xilinx-FPGAs.pdf.
- This gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware