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generic_fifos
- Generic, multi-purpose FIFOs. Available as single clock and dual clock version, binary, lfsr, and gray encoded (dual clock only). All are parameterizable and use generic_memories for memory. These FIFOs are fully portabl
bysj7
- CVSD语音压缩的算法和程序流程.量阶δ能够自动地随输入信号平均斜率的大小而连续变化,译码输出信号实现了对输入信号的理想逼近,最后在可编程逻辑器件(FPGA)中实现了CVSD调制功能。-CVSD voice compression algorithm and the program flow. Volume bands can automatically input signal with an average slope of th
userbscan
- xilinx FPGA上使用jtag接口作为用户IO的源码。支持任意位宽度。-Xilinx FPGAs use JTAG interface as user IO source. Support for arbitrary bit width.
Altera.Oct05
- FPGAs rise to meetincreasing DSP system requirements-FPGAs rise to meetincreasing DSP system're quirements
DSP_WITH_FPGA
- The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning ho
Product_Guide_Altera_RevC
- Power Management Solutions for Altera’s FPGAs and CPLDs，希望对大家有帮助！
AccelDSP
- AccelDSP Synthesis Tool Floating-Point to Fixed-Point Conversion of MATLAB Algorithms Targeting FPGAs
wp-video0306
- Video and Image Processing Design Using FPGAs，很好的利用FPGA进行视频及图像处理的参考文档。-Video and Image Processing Design Using FPGAs, a very good use of FPGA for video and image processing reference documentation.
Implementing_Floating-Point_DSP
- For developers using FPGAs for the implementation of floating-point DSP functions, one key challenge is how to decompose the computation algorithm into sequences of parallel hardware processes while efficiently
DDR_SDRAM_controller
- DDR SDRAM控制器的VHDL源代码，含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Cl
fpgafft
- :文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行 分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。 最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。-Based on the analysis of the FFT algo
Digital_Filter_implementation_by_FPGA
- 1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis 2. fpga implemention of a median filter 3. fpga implementation of digital filters 4.hardware acceleration of e
EMIF_COM
- 实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口-the interface for TI DSP and Xilinx s FPGAs
fpga_security
- The use of FPGAs for cryptographic applications is highly attractive for a variety of reasons but at the same time there are many open issues related to the general security of FPGAs. This contribution attempts to provid
analog_filter_VHDL
- Analog filter in Vhdl for fpgas
2_MotorControl
- this the stepper motor contro lcode on xilinx spartan fpgas enjoy the cod e nd keep helpin each other-this is the stepper motor contro lcode on xilinx spartan fpgas enjoy the cod e nd keep helpin each other
MotorControl
- this the stepper motor contro lcode on xilinx spartan fpgas enjoy the cod e nd keep helpin each other-this is the stepper motor contro lcode on xilinx spartan fpgas enjoy the cod e nd keep helpin each other
genode-fx-2009-03
- Genode FX is a composition of hardware and software components that enable the creation of fully fledged graphical user interfaces as system-on-chip solutions using commodity FPGAs.
LatticeMico8_v3_0_Verilog
- The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Crossover Programmable Logic Device architectures from Lattice. Combining a full 18-bit wide instruction set w