搜索资源列表
SDRAM
- 清华大学－电子信息工程系－实验用ARM-linux－源代码－SDRAM篇-Tsinghua University- Electronic Information Engineering- experiment with ARM-linux-source code-SDRAM articles
ref-sdr-sdram-verilog
- sdram的控制器 verilog源码-SDRAM controller Verilog source code
ref-sdr-sdram-vhdl
- FPGA连接SDRAM的源程序，VHDL语言实现，功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
DSP-SDRAM
- 详细介绍了如何在DSP中如何正确配置EMIF模块来设置SDRAM-Detailed information on how to how to properly configure the DSP in the EMIF module to set the SDRAM
SDRAM
- SDRAM的程序，用于SISIS公司的MCU和三星的SDRAM-SDRAM, which is used SISIS company s MCU and Samsung s SDRAM
sdram
- sdram controller.verilog
SDRAM
- SDRAM的详细介绍，包括详细的使用说明，内部结构等-SDRAM detailed introduction, including detailed instructions, the internal structure
SDRAM
- 基于FPGA的SDRAM控制器的设计和实现,还比较好勒.-FPGA-based SDRAM controller design and realization, but also better le.
Sdram
- 对于DSP C6000系列视频处理开发中,SDRAM于对视频编码数据的存储,此代码为SDRAM的驱动程序-DSP C6000 series for the development of video processing, SDRAM video encoding data on the storage, the code for SDRAM driver
ref-sdr-sdram-verilog
- sdram控制器的开发程序，还有文档，可以参考以下-SDRAM controller development process, there is a document, you can refer to the following
ref-sdr-sdram-vhdl
- 标准SDR SDRAM控制器参考设计_verilog_lattice\sdr_ctrl.v-Standard SDR SDRAM Controller Reference Design _verilog_latticesdr_ctrl.v
sdram
- sdram test controller altera -sdram test controller altera
SDRAM
- SDRAM的原理和时序，对于实现对SDRAM操作非常有帮助！-SDRAM principle and timing, for the realization of the operation of the SDRAM very helpful!
sdram
- vhdl 编写的sdram controler, 双通道-VHDL prepared sdram controler, dual-channel
ref-sdr-sdram-verilog
- SDRAM的vegilog代码，做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
sdram
- sdram的内存初始化源代码，有要的赶快下-SDRAM memory initialization source code, there should be as soon as possible under the
(fpga)sdram
- verilog 代码，读写SDRAM 不带仿真，需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
ref-sdr-sdram-verilog
- 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
ref-ddr-sdram-vhdl
- 基于VHDL编写的DDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller