搜索资源列表
rd1014
- SDRAM控制器,对SDRAM进行页写和对SDRAM进行页读的快速读写。是一个很好的SDRAM控制器-SDRAM controller, SDRAM to write for pages and pages of SDRAM for fast reading literacy. It is a very good SDRAM Controller
K4S281632F-TC75
- sdram 的详细资料，好好保留，公司内部所有，不得用于商业。-SDRAM detailed information properly retained within the company for all, not for commercial.
mt48lc2m32b2
- SDRAM控制核，已经经过测试，完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
SDRAM_C
- SDRAM控制核，已经经过测试，完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
sdram_control_burst
- 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
Pcidriver
- PCI驱动编程实例，通过PCI可实施操作： 2、通过DMA方式往SDRAM写数据的步骤： (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写2 3、通过DMA方式从SDRAM读数据的步骤： (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写3 -PCI-driven programming exampl
SDRAMtest
- 44b0的SDRAM测试程序，使用ADS1.2环境-44b0 SDRAM testing procedures, the use of the environment ADS1.2
SDRAM_DEVICE_OPERATION
- 三星公司SDRAM（K4S643232H-TC/L60 4 Banks x 512K x 32Bit Synchronous DRAM） 器件操作时序，本中文的页码和原英文对应的页码内容相对应-Samsung SDRAM (K4S643232H-TC/L60 4 x 51 Banks 2K x USB Synchronous DRAM) devices operate timing, the pages of the Chinese a
C6416SDRAM
- Ti C6416 读写 SDRAM 口范例. 编程环境CCS2.2版本-Ti C6416 literacy SDRAM mouth example. Version Programming Environment CCS2.2
EvsStore
- 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
sdramusevhdl
- sdram的vhdl实现 本文介绍了sdram的控制时序特征，并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies
at91rm9200bsp
- AT91RM9200工程评估板的CPU源代码，基于ARM920T内核的AT91RM9200，180MHz，32/64M SDRAM，4M NOR Flash 10/100Mbps以太网，Linux操作系统。该源代码经过修改和项目支持，可以稳定运行。有一定的工程参考价值-AT91RM9200 CPU source code, Based on the AT91RM9200 ARM920T core, 180MHz. 32/64M SDRA
mt48lc2m32b2
- the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram- mt48lc2m32b2 d evice.
DSP-I2S-DMA
- TI DSP TMS320VC5509A的SDRAM、I2S、DMA等的接口程序。-TI DSP TMS320VC5509A of SDRAM, I2S, DMA interface procedures.
mt48lc8m16a2
- sdram的行为级模拟模块,可以模拟一个sdram,用于仿真对sdram的控制.-sdram behavioral simulation module can simulate a sdram. Simulation for the control of sdram.
sdram_control
- 这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱：wleechina@163.com-This is what I found online vhdl language used to write the sdram controller code. My mail : wleechina@163.com
sdr_c_trl_verilog
- SDRAM 控制器的Verilog代码 经过综合验证过的.无截压密码-SDRAM controller Verilog code comprehensive test after all. No cut-off pressure Password
Demo_ST44B0X
- 44binit.s ----- 初始化中断、存储器、堆栈等，进行系统初始化，建立C程序运行环境。 memcfg.inc ----- 定义存储器延时、SDRAM配置等参数 option.inc ----- 定义系统时钟频率等 main.c ----- 系统主程序（Main函数等） 44blib.c ----- IO端口初始化、延时和异步串口通讯等基本子程序-44binit.s----- initializ
TI55sdram
- TI55系列DSP的EMIF开发中SDRAM的开发配置例程-TI55 series DSP Development SDRAM EMIF the development configuration routines
sdram_verilog
- 这是使用VERILOG语言，基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic