搜索资源列表
sdram_vhdl_lattice
- lattice sdram 控制器VHDL源代码-Sound code of Lattice Sdram Controller based on VHDL
ref-ddr-sdram-vhdl
- 用VHDL编写DDR SDRAM Controller的源代码- Compiles DDR SDRAM Controller with VHDL the source code
8255
- 8255参考设计VHDL源代码-The sound code of 8255 reference design based on VHDL
8051IP 核源代码(VHDL)
- 8051IP 核源代码-8051IP nuclear source code
random data gen(vhdl)
- 任意数据发生器的源代码-arbitrary data source code generator
COP2000
- cpu微命令vhdl源代码-cpu-order VHDL source code
vh
- 有用的VHDL源代码-useful VHDL source code
VHDL源代码2
- VHDL与源代码包-and VHDL source code
VHDL源代码3
- VHDL与源代码包-and VHDL source code
VHDL源代码4
- VHDL与源代码包-and VHDL source code
fpga加密设计方法
- FPGA加密的方法,对于那些需要加密自己的vhdl源代码的人来说,很有用-FPGA encryption methods for those who need to encrypt their VHDL source code in a way, very useful
mc8051_cyclone_nios
- 增强型8051的VHDL源代码,两个周期执行一条指令,仿真工具为Modelsim,开发板为Altera的EP1C20开发板-enhanced 8051 VHDL source code, the implementation of a two-cycle instruction, simulation tools for Modelsim, development board for the Altera EP1C20 developm
FFT变换的IP核的源代码 VHDL~
- FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
vhdl实现alu的源代码
- VHDL实现ALU的源代码,并且提供了一个详细的testbench!-ALU VHDL source code, and provide a detailed testbench!
嵌入式系统试验报告-乘法器-VHDL语言
- 嵌入式系统的乘法器试验报告 包括源代码 用VHDl语言编写-Embedded System multiplier test report including source code language used VHDl
config_controller
- 用VHDL硬件描述语言实现的对FPGA(Cyclone II)的配置的VHDL源代码。-VHDL hardware descr iption language for FPGA (Cyclone II) configurations VHDL source code.
ZBT SRAM控制器参考设计vhdl_xilinx
- ZBT SRAM控制器参考设计,xilinx提供的VHDL源代码-ZBT SRAM controller reference design for Xilinx VHDL source code
USB接口控制器参考设计_xilinx提供_vhdl
- USB接口控制器参考设计,xilinx提供的VHDL源代码-USB interface controller reference design for Xilinx VHDL source code
一些VHDL源代码
- 内有波形发生器,加法器,经典双进程状态机,伪随机熟产生器,相应加法器的测试向量,16×8bit RAM,FIFO,通用RAM等源程序-within waveform generator, Adder, classic dual-process state machine, cooked pseudo-random generator, the corresponding Adder test vector, 16 x 8bit RAM,
8位大小比较器
- 8位大小比较器的VHDL源代码,Magnitude Comparator VHDL descr iption of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL descr iption of a 4-bit magn