搜索资源列表
fsm
- Finite state machine for a cordic processor
FSM
- This program can determin very accurately the nature of the user input.it detects whether it is an integer, a float, a number in scientific notation
spi_master
- SPI wishbone master and verification environment
FSM
- Measurement of focal spot size using knife edge method
spi
- send SPI data that is writen as FSM-send SPI data that is writen as FSM
fsm
- its a finite state machine simulator
fileread
- file_read vhdl code provide by my teacher for reading file into FSM-file_read vhdl code
EfficientSynthesizableFiniteStateMachineDesignusin
- 高效的同步有限状态机的设计，本代码详细的说明了如何设计高效和规范的fsm设计-Efficient Synthesizable Finite State Machine Design using NC-Verilog
FSM
- FPGA实现状态机功能 -FPGA realization of the state machine function
testgray
- 有限状态机FSM编程设计及测试，代码合一了，以三位gray码为例，在modulesim5.7上测试通过。-Finite state machine FSM programming design and test, code-one, and with three gray code, for example, in the modulesim5.7 on the test.
topsequence
- modeling of fsm in vhdl
youxianzhuangtaiji
- 有限状态机的说明以及源代码 有限状态机的说明以及源代码-FSM
state_mm
- 有限状态机源码，verilog语言编写。非常详细的示范了FSM状态机的编写。-Finite state machine source code, verilog language. A very detailed model of the FSM state machine preparation.
FSM
- finite state machine design
fsm_tb
- An odd parity checker as an FSM using VHDL
johnson_encoding_angle
- An FSM using VHDL and Johnson state encoding for states
CM12864
- cm12864液晶显示器的vhdl驱动代码，基于状态机的转换，实现显示功能。-descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve the display function.
FSM
- 这是用verilog硬件描述语言编的moore状态机代码-It is compiled verilog hardware descr iption language moore state machine code
FIR
- The first three examples illustrate the difference between RTL FSMD model (Finite State Machine with Datapath buildin) and RTL FSM + DataPath model. From view of RT level design, each digital design consists of a Control