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pll_ok
- 完整的锁相环matlab代码实现，其中包括高斯噪声干扰，频差，相差，给出最后频率及相位收敛结果图。重要的是代码中有本人详细注释，易于理解-Complete phase-locked loop matlab code, including the Gaussian noise interference, frequency difference, a difference, given the final results of the f
PrenticeHallPrincipleofCommunicationSystemSmulatio
- 本书分成三部分，第一部分讨论了仿真的作用和方法论。第二部分介绍了采样定理，滤波器模型、锁相环等的仿真。第三部分是高层建模与仿真方法。-The book is divided into three parts, the first section discusses the role of simulation and methodology. The second part of the sampling theorem, the fi
verilog
- 采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
pll
- 一個基本的鎖相迴路設計(PLL)simulink 程序-A basic phase-locked loop design (PLL) simulink program
PLL_1
- Block model of a phase locked loop implemented in Simulink. Step 1 of a series of 5 developed models.
wtut_sc
- DCM includes a clock delay locked loop used to minimize clock skew for Spartan-3, Virtex-II, Virtex-II Pro, and Virtex-II Pro X devices. DCM synchronizes the clock signal at the feedback clock input (CLKFB) to the cl
digital_pll
- 传统的数字锁相环系统是希望通过采用具有低通特性的环路滤波器，获得稳定的振荡控制数据由于数字电子技术的迅速发展，尤其是数字计算和信号处理技术在多媒体、自动化、仪器仪表、通讯等领域的广泛应用，用数字电路处理模拟信号的情况日益普遍。所以模拟信号数字化是信息技术的发展趋势，而数字锁相环在其中扮演着重要角色。-Conventional digital PLL system is to have a low-pass characteristics
Matlabpll
- 基于Matlab的数字锁相环的仿真设计，一篇毕业论文，对数字和模拟锁相环进行了详细的分析和仿真-Matlab-based simulation of digital PLL design, a thesis on digital and analog phase-locked loop for a detailed analysis and simulation
dll_good_2137
- Delay locked loop Exmples
A-digital-phase-locked-and-UPS-bypass-detection-an
- A digital phase-locked and UPS bypass detection and switching control
PLL
- Phase locked loop(PLL) Verilog HDL code
Phase-locked-loop
- 该程序是锁相环的MATLAB的简单实现程序，从中可以看到锁相环的基本功能的实现。-This program is a simple phase locked loop of MATLAB implement programs, from which you can see the basic function of phase-locked loop of implementation.
FLL-P-locked-loop-example
- FLL+锁频环例子程序。用于实验板，用于4xx系列。-FLL+ locked loop example program. For the experimental plate for 4xx series.
Response-of-a-First-Order-Phase-Locked-Loop-to-Tw
- Response of a First-Order Phase Locked Loop to Two Sinusoidal Inputs
Mode_Locked
- 自己编写的锁模激光器原理模拟，很简单有助于理解锁模激光脉冲的性质。-I have written a mode-locked laser simulation principle is very simple to help understand the nature of mode-locked laser pulses.
Linux-file-locked
- linux文件读写及上锁,可以在linux系统交叉编译环境下，进行验证。-linux file locked.Read and write.
Phase-locked-
- 锁相环的matlab实现及仿真，PPL原理及仿真-Phase-locked loop matlab implementation
virtual-machine-is-locked
- 解决virtual machine is locked问题，许多人遇到此问题，就毛了，我给大家一个解决的小窍门-Solve the virtual machine is locked problem many people encounter this problem, hair tips that I give everyone a solution
Phase-Locked-Loop.rar
- charge pump phase-locked loop with digital phase-frequency detector,charge pump phase-locked loop with digital phase-frequency detector matalab model
Mode-Locked-Lasers
- Mode locked lasers fiber code, I run it from appendix but its not working. Although I tried a lot to get it resolved. .m files are enclosed.