搜索资源列表
UYYTY
- 一种关于高速时钟提取的文章，讲述了锁相环提取时钟的优缺点。-A high-speed clock extraction on the article, described the advantages and disadvantages of phase-locked loop clock extraction.
DPLL_Circuit
- 本文在说明全数字锁相环的基础上，提出了一种利用FPGA设计一阶全数字锁相环的方法，并 给出了关键部件的RTL可综合代码，并结合本设计的一些仿真波形详细描述了数字锁相环的工作过程，最后对一些有关的问题进行了讨论。-In this paper, that all-digital phase-locked loop based on a FPGA design using first-order DPLL method, and give
clkrecoveryDPLL
- 用于时钟恢复的全数字锁相环设计，可以去掉时钟的抖动。-Clock recovery for all-digital phase-locked loop design, the clock jitter can be removed.
pllddfs
- 一种基于锁相环的数字频率合成器的设计-Based on Phase-Locked Loop Digital Frequency Synthesizer Design
SW
- FPGA弹弓无线呼叫系统分发射和接收两大部分。发射部分采用锁相环式频率合成器技术-FPGA slingshot wireless call system transmitting and receiving at most two. Part of the launch phase-locked loop frequency synthesizer using technology
SC9257AZ
- 适合做汽车音响的朋友参考 9257锁相环中文资料-Suitable for car audio friends refer to 9257 Chinese data phase-locked loop
sj
- 这是一个对数据进行加密的程序，输入密码，锁上或打开数据。-This is a data encryption program, enter the password, locked, or open the data.
XuanMu_gb_V15
- 旋木留言本 v1.51 主要功能： UBB代码支持，可自定义网站名称、地址、管理员姓名、邮箱、管理密码、每页显示数等，可锁定留言本从而阻止访客留言。可发布公告，回复/编辑回复、删除留言。通过按钮可以在留言的任意位置添加表情符号（最新版QQ的）。自带一个访问统计。 -Certhia Guestbook v1.51 main functions: UBB code support, customizable web sit
datelock
- 时间锁，只是一个算法源代码，用于有时间限制的软件，提供时间锁定的思路-Time to lock, only an algorithm source code, have a time limit for the software, to provide time-locked train of thought
test1
- system view实现锁相环，含AM、FM、PM-system view to achieve phase-locked loop, including AM, FM, PM
Matlab_model
- 在MATLAB环境下，对全数字锁相环的仿真，分析锁相环的性能参数-In the MATLAB environment, to all-digital phase-locked loop simulation, analysis of the performance parameters of phase-locked loop
3DPLL_fangan
- 介绍了数字锁相环的3种设计方法，并对各自的工作原理做了详细分析。-Introduction of digital phase-locked loop of three kinds of design methods, and their working principle to do a detailed analysis.
dipinshuzixiangweiceliangyi
- 低频数字式相位测量仪，采用了锁相技术、CPLD等技术-Low-frequency digital phase-measuring instrument, using a phase-locked technique, CPLD technology
weifenqi
- 微分器：利用数字锁相环进行位同步信号提取的关键模块-Differentiator: the use of digital phase-locked loop for bit synchronous signal extraction of key modules
adpll
- 全数字锁相环 功能与74297相同 提供参数配置-All-digital phase-locked loop function and to provide parameters to configure the same 74,297
PLL
- 锁相环原理的Matlab仿真程序（调试修改不同参数得到不同波形图）-Phase-locked loop principle Matlab simulation program (debugging modify the different parameters of different waveforms)
pta
- 正交频分复用基于IEEE802.11a的PTA跟踪法，同学自己编的，较复杂，运用了锁相环-Orthogonal frequency division multiplexing IEEE802.11a-based tracking method of the PTA, the students made their own, and more complex, using a phase-locked loop
QPSK
- 基于锁相环的BPSK，QPSK的调制解调程序，并给出了仿真结果-Phase-locked loop based on the BPSK, QPSK modulation and demodulation of the procedures and simulation results
PLL
- 国外一篇很好的数字锁相环（PLL）设计文档（解压后PLL.pdf），不可不看呦！-Abroad, a good digital phase-locked loop (PLL) design documents (after extracting PLL.pdf), can not look at Yo!
AlarmLock
- 汽车防盗器控制器源码，采用电力载波方式，后端通过一个锁相环解调。-Car anti-theft controller source, using power line carrier way back through a phase-locked loop demodulation.