搜索资源列表
pipe
- verilog编写的流水线模块-Verilog modules prepared by the Pipeline
dlx
- mips pipeline 模以程序，mfc实现的，功能就不用说了把，大家都知道的-MIPS pipeline to die procedures mfc achieve, and functions not have had to put, we all know the
3dpipe
- 一个三维gis管线的源代码 做三维管线gis的开发人员可以参考下-a 3D pipeline gis the source code to do 3D pipeline gis developers can refer to the next
statemachine11.2
- 推荐下载,verilog状态机实例.体现了流水线思想的应用 -recommend downloading Verilog state machine example. Pipeline reflects the thinking of the application
multi-tasking
- vxworks 下多线程编程事例代码 包括：管道，队列，信号，多线程-vxworks multi-threaded programming code examples include : pipeline, queue, signals, multithreading
PDS-Pipe
- 采用ANSYS软件的APDL语言编写的两个命令流文件，用于计算含缺陷管道的失效概率，将参数稍作改动，可用于其它结构的可靠性分析-using ANSYS APDL preparation of the two documents order flow, used in the calculation of pipeline containing defects failure probability of parameters minor
ivrjk
- pb数据管道,可以选择要上传的表,实现多表连续上传.-pb data pipeline, we can choose to upload tables, multi-row table uploads.
MyNamedPipe
- 管道技术，利用管道实现两个进程数据交换，包含事件消息-pipeline technology, the use of two pipelines achieving data exchange processes, including news events
Pipeline_synchronization
- Pipeline synchronization is a simple, low-cost, highbandwidth,highreliability solution to interfaces between synchronous and asynchronous systems, or between synchronous systems operating from different clocks.-Pipelin
DES-pipeline
- 主要介绍算法的实现方式和流水线实现，而且有详细的原理介绍，推理，源码和仿真结果-The main way of introduction Algorithm and pipelining to achieve, but also has a detailed introduction of the principle, reasoning, source code and simulation results
add_3p
- 3级流水线，含4元件的22位全加器的VHDL语言实现，适用于altera系列的FPGA-3-stage pipeline, with 4 components of 22 full adder realize the VHDL language, applicable to altera Series FPGA
DotNetNamedPipes
- 介绍C#的管道技术，实现程序之间的通讯。在Microsoft Visual Studio 2005 下编译通过。值得借鉴-Introduced the C# Pipeline technology, communication between procedures. In the next Microsoft Visual Studio 2005 compiler through. Worth learning
pipeline
- samples for pipe line source code -samples for pipe line source code
8bit_multi_pipeline
- 8 bit multiplier with pipeline design, mainly for studying and learning purpose
oil_pipe
- 输油管道问题，用文件的方式，用的是分而治之的思想-Pipeline problems, and use of papers, using a divide and rule ideology
Plumber
- 2767 管道连接的游戏. 个人觉得做的不错. 很耐玩,不下是损失-2767 pipeline game. Personally feel that to do well. Very Nai Wan, is no less than loss
CORDIC_ip
- cordic IP core Features Each file is stand-alone and represents a specific configuration. The 4 parameters are: Rotation or Vector Mode Vector Precision Angle Precision Number of Cordic Stage
fifo
- 一个使用匿名管道进行通信的示例程序，重点是管道是单向的，进行读写需要建立两个管道。-A pipeline to carry out the use of anonymous communications sample programs, with a focus on pipeline is one-way, to read and write need to build two pipelines.
dlx_verilog
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。-This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and c
bp
- 本书涉及的研究方法主要应用于油田生产的实际工作中，包括一般储层参数预测、薄互油藏参数预测、火山岩储层参数预测和储层随机模拟等问题，同时还涉及了石油工业中的油管缺损检测、海底输油管道腐蚀检测等应用问题，对污水处理絮凝过程的智能优化控制及移动机器人的全局和局部路径规划等问题的应用也进行了一定的研究。-Book of research methods involved are mainly used in oil field product