搜索资源列表
USB_VHDL_CODE
- USB接口控制器参考设计VHDL代码,方便开发FPGA人员进行USB的开发，是一个不错的源码。-USB interface controller reference design VHDL code, facilitate the development of FPGA personnel USB development, is a good source.
xapp354_vhdl
- 用CPLD实现NAND FLASH接口的VHDL源码-Using CPLD realize NAND FLASH interface VHDL source code
aes_8bit
- VHDL实现128bitAES加密算法 LOW AREA节约成本的实现 DATA FLOW为8bits-VHDL realize 128bitAES encryption algorithm LOW AREA realize cost-saving DATA FLOW for 8 bits
DAC0832
- 由VHDL 语言实现的DA0832器利用的是QUARTUES环境已经得到验证-By the VHDL language uses the DA0832 is QUARTUES environment has been tested
AD0809
- 由VHDL 语言实现的AD0809用的是KEIL环境已经得到验证-By the VHDL language used in the AD0809 is KEIL environment has been tested
bch_encoder_decoder
- bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh
NCO_ip
- NCO的VHDL程序，是利用IP核生成的，超好的，快下吧-NCO of the VHDL process is the use of nuclear-generated IP, super good, fast, are you
POS_PHY_RTL
- VERILOG五POSPHY LEVEL3电路描述，可综合,已经过检验.-Five POSPHY LEVEL3 Verilog circuit descr iption can be integrated, has been tested.
fpga+1602
- 本程序用VHDL语言编程实现FPGA对点阵液晶1602的驱动 -This procedure using VHDL language programming FPGA to realize the 1602 dot-matrix LCD driver
S6_LCD_VHDL
- 采用vhdl语言编写的16x2液晶显示模块的驱动程序。在quartus中编译完成，可直接运行-err
AD9851
- 用VHDL语言编写的DDS正弦函数发生器-Using VHDL language DDS sine function generator
ref-sdr-sdram-vhdl
- FPGA连接SDRAM的源程序，VHDL语言实现，功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
IRDA
- 主要介绍红外接收与发射模块基于EDA的制作，文档说明很详细，共同分享，希望大家多传一些源码上来，这个网站太牛了，源码已经很多了，给我们的设计带来了很多方便，特别感谢站长，付出了辛勤的汗水，以后会多传源码的，-Introduce the main infrared receiver and transmitter module based on the EDA
VHDL-timer
- 这是关于VHDL时钟的源代码，欢迎大家下载交流！-This is a clock on the VHDL source code, welcomed the exchange of everyone to download!
des
- DES加密VHDL源代码,包括速度优先与面积优先两种设计-DES encrypted VHDL source code, including the rate of priority and an area of priority two design
ip_fft128
- 128点fft的IP核vhdl源代码，另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
ADS8361
- TI公司的AD8361的VHDL控制程序，可实现CPLD的采集。-TI s AD8361 the VHDL control procedures, the acquisition can be realized CPLD.
nco
- 用VHDL语言写好得，直接可用NCO设计-VHDL language was used to write directly available NCO design
CORDIC_VHDL
- 用cordic算法来实现求解正弦,余弦及反正切的FPGA实现原代码-CORDIC algorithm used to achieve the solution of sine, cosine and tangent of the FPGA to achieve the original code
ads7816
- 这是串行AD采集芯片ADS7816的读写程序，采用Keil编译。-This is the serial AD acquisition of reading and writing chip ADS7816 procedure for the Keil compiler.