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weisuiji
- 实现f(x)=1+x^4+x^9的伪随机序列发生器-Pseudo-random Sequence
DSSS
- 任意长度的伪码序列发生器,并包含测试程序。-Any length pseudo-code sequence generator, and includes test procedures.
VHDL
- 先设计序列发生器产生序列:1011010001101010;再设计序列检测器,检测序列发生器产生序列,若检测到信号与预置待测信号相同,则输出“1”,否则输出“0”,并且将检测到的信号的显示出来。-First design sequence generator sequence: 1011010001101010 redesign sequence detector to detect sequence generator sequen
vhdl
- 伪随机序列发生器的vhdl算法 设计一个伪随机序列发生器,采用的生成多项式为1+X^3+X^7。要求具有一个RESET端和两个控制端来调整寄存器初值(程序中设定好四种非零初值可选)--Design of VHDL algorithm for pseudo random sequence generator is a pseudorandom sequence generator, using the generating polynom
matlab_code
- M和m序列发生器,用于扩频通信中产生长度为2^N和2^N-1的伪随机码。同时还有产生bpsk调制的扩频调制和解调系统仿真,以及gold码的mat文件。-M and m sequence generator.Used for spread spectrum communication to generate the spread code.As well as bpsk spread spectrum system communicati
m
- 本设计实现了一个12级m序列发生器,包含源文件及其测试文件。-This design has realized a level 12 m sequence generator, and the test file contains the source file.
m_xulie
- 这是用verilogHDL写的m序列发生器,简单易用,代码非常易读-It is written verilogHDL m sequence generator, easy to use, the code is very easy to read
fenpin
- 对m序列进行2ASK调制 包含分频器 m序列发生器 正弦信号发生器 二路选择器4个模块-process m sequence with 2Ask includes frequency divider, m sequence generator, sine signal generator and MUX
Gsequence
- 卫星导航Gold 序列发生器,输出gold序列自相关值与互相关值-GNSS Gold sequence generator,can output cross/auto-correlation figure
msequence
- 卫星导航m序列发生器,输出其自相关与互相关值,-GNSS m sequence generator can output cross/auto-correlation function
pseudo-random-number-VHDL
- 伪随机序列发生器的vhdl软件,有m序列和gold序列的算法-pseudo random number generator
FPGA__source-code__Verilog
- FPGA部分基础功能源代码,适合初学者进行学习仿真,代码可读性强,通俗易懂,逻辑清晰。包括触发器,全加器,分频,并串转换,计数器,序列发生器等Verilog语言源代码。- Part of the basic functions of the source code for FPGA.Suitable for beginners to learn the simulation, the code readable, easy to u
e12HDB3
- 清华大学电子工程系 HDB3实验报告 包括:M序列发生器,编码器,解码器-Electronic Engineering, Tsinghua University HDB3 lab report include: M sequence generator, encoders, decoders
m_sequence_mod
- 伪随机序列,m序列发生器,可灵活配置抽头文件,已经仿真通过-m SEQ MODULE
M_generation
- 伪随机序列发生器,即M序列发生器,VHDL语言完成,已仿真通过。-Pseudo-random sequence generator, VHDL language completed, through simulation.
PNdemo
- PN序列发生器,产生伪随机序列的程序。 程序产生的伪随机序列可以用于建立数据源模型。-PN sequence generator, pseudo-random sequence generator. Pseudo-random sequence generated by the program can be used to set up a data source model.
VHDLquartusmodelsim
- 内容有VHDL语法总结及相应的实例应用,每个程序我都亲自试过,特别适合初学VHDL的同学们。常用的程序有 设计一个M序列发生器,M序列为“11110101”、 设计一个彩灯控制器,彩灯共有16个,每次顺序点亮相邻的四个彩灯,如此循环执行,循环的方向可以控制。设计一个跑马灯控制器。一共有8个彩灯,编号为LED0~LED7,点亮方式为:先从左往右顺序点亮,然后从右往左,如此循环往复等等。这些都是我在考试前熬夜总结的,很有用。如果配合开发板
m_xulie
- m序列发生器,并进行曼彻斯特编码,亲自编写,已经经过验证-m-sequence generator, and Manchester encoding
mcode
- 附有m码产生verilog文件和测试文件,以及详细说明。读者可根据说明配置任意级m序列发生器(With M code, Verilog files and test files are produced and detailed. The reader can configure an arbitrary m sequence generator according to the instructions)
3M
- 在FPGA实验操作系统实现ASK,FSK,PSK的调制解调,基带信号由M序列发生器产生,经过AD模块在示波器上进行显示,精油DA模块在同一块实验板上进行解调操作,生成信号控制LED灯的亮灭,并与调制输出信号在示波器上同时展示,并进行对比。基带信号为3MHz。(In the FPGA operating system experiment implementation ASK, FSK, PSK modulation and demodu