搜索资源列表
usb_jtag-20070215-1134
- USB JTAG 卡. 允许从主机USB口直接控制JTAG I/O 信号。 USB端与Altera USB-Blaster使用相同的协议。主机端与openwince, OpenOCD和Altera的软件兼容-USB JTAG card. From the mainfr a me to allow direct USB JTAG control I/O signals. USB terminal and Altera USB-Blas
DSPdesignflow
- altera的DSP设计流程简介 简单介绍了设计框图-altera DSP design flow briefed on the design diagram
Quartus_II_7.0_decoder
- Altera公司的Quartus7.0的lisence 破解程序-Altera's Quartus7.0 the lisence crack procedures
std_cf_1c20
- Altera公司开发板1c20 CF卡通用例程（初始化、读、写、测试等）-Altera Corporation development board 1c20 CF cartoon with routines (initialization, reading, writing, testing, etc.)
std_cf_1s40
- Altera公司开发板1s40 CF卡通用例程（初始化、读、写、测试等）-Altera Corporation development board 1s40 CF cartoon with routines (initialization, reading, writing, testing, etc.)
std_cf_2s60_ES
- Altera公司开发板2s60 CF卡通用例程（初始化、读、写、测试等）-Altera Corporation development board 2s60 CF cartoon with routines (initialization, reading, writing, testing, etc.)
EP1C12-Q240
- ALTERA的EP1C12-Q240的原理图,PROTEL99SE格式.-of Altera EP1C12- Q240 the diagram, PROTEL99SE format.
QuartusII_sum
- Altera Quartus II使用方法的总结性文件-Altera Quartus II use of the concluding document
ALTERACPLD
- ALTERA CPLD器件的配置与下载,贡献给初学习者,非长有用-Altera CPLD and download configuration contribute to the early learners, non useful
20070412011I2C
- 由altera提供的原码，实现I2C控制的源代码程序-altera provided by the original code, I2C control of the source code procedures!
DDS_VHDL_xzy
- 在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器，芯片是Altera公司的-in EDA software development QuartusII use VHDL DDS signal generator , chip companies are Altera
altera_USB_blaste
- altera USB blaste 制作全套资料。包括原理图、93LC46的配置文件和CPLD的VHDL源程序。-altera USB blaste produced full set of information. Including drawings, 93LC46 configuration files and CPLD VHDL source.
ALTERA_device_choice
- this a book about altera fpga device choice ,it is good for developing eda with fpga
AlteraPGA
- 加密Altera的FPGA的方法 加密Altera的FPGA的方法-Altera FPGA encryption method Altera FPGA encryption methods
leon3-altera-ep1c20
- leon3 patch for altera ep1c20 FPGA.
spi
- VHDL 实现的SPI接口，在Altera EMP7128 上应用过-VHDL SPI interface, the application of Altera EMP off
Modelsim_timing_simulation_library
- 文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法-Article on how to add ModelSim simulation library, including the add xilinx, altera, actel the company
logic_lock
- logic lock 的vhdl源码，altera平台适用。-logic lock the VHDL source code, altera platform.
leon3-altera-ep2s60-sdr
- ahb sdram interface.arm cpu series,include controller
VGA
- VGA Component for Altera SOPC Builder on DE2