资源列表
[VHDL编程] Security-System
说明:The security system implemented monitors the state of eight doors (open or closed) and shows the state in leds when the selector indicate it. Also the number corresponding to the desired door is shown in a 7seg display.<dokuro> 在 2025-06-11 上传 | 大小:658kb | 下载:0
[VHDL编程] Frecuency-Divisor
说明:This code Use the 50 Mhz clock of BASYS 2 FPGA to generate a frecuency divisor (choose the div value using FPGA Switches). The result is shown in two leds to compare, one have a frecency fixed (with out div ) and the secon led showm the div selected<dokuro> 在 2025-06-11 上传 | 大小:129kb | 下载:0
[VHDL编程] ins_Decoder
说明:采用VHDL语言编写的矩阵变换器四步换流程序-matrix converter<hufengge> 在 2025-06-11 上传 | 大小:4kb | 下载:0
[VHDL编程] RS485verilog
说明:这是用Verilog写的RS485通信程序,可以使用,希望大家能够互相交流,-This is a Verilog writing RS485 communication program, can be used, I hope we can communicate with each other,<汪静> 在 2025-06-11 上传 | 大小:639kb | 下载:0
[VHDL编程] AD9548_Driver155555
说明:ad9548的详细驱动程序,非常全面,内含有测试图片,与大家交流。-ad9548 driver detailed, very comprehensive, containing the test images to share with you.<李延刚> 在 2025-06-11 上传 | 大小:824kb | 下载:0
[VHDL编程] ones_counter
说明:8bit 的计数器,如文件名所示microprogram_controlled_ones_counter_constraints_ise6_bak。VHDL-8bit counter, as shown in the file name. VHDL<wendy> 在 2025-06-11 上传 | 大小:1.25mb | 下载:0
[VHDL编程] Codes
说明:USB 2.0 using VHDL with files : main.c, drice.c and HIGH_SPEED_USB_CORE_SETUP_TRANSACTION<altenategoody> 在 2025-06-11 上传 | 大小:56kb | 下载:0
[VHDL编程] 11053022286676
说明:基于 MATLAB/DSP Builder DSP 可控正弦信号发生器设计-MATLAB/DSP Builder DSP controlled sinusoidal signal generator design<ludlow> 在 2025-06-11 上传 | 大小:485kb | 下载:0
[VHDL编程] modelsim-book
说明:modelsim仿真教程,教你如何使用modelsim的简明教程。-modelsim simulation tutorial to teach you how to use a simple tutorial modelsim.<ludlow> 在 2025-06-11 上传 | 大小:334kb | 下载:0