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[VHDL编程] Channel_EstimationMIMO
说明:本文对MIMO技术中的信道估计、空时编码和单载波频域均衡技术(SC-FDE)及其在FPGA上的实现进行了深入的研究-In this paper, MIMO channel estimation techniques, space-time coding and single-carrier frequency domain equalization (SC-FDE) and its implementation on FPGA-depth study carried out<w> 在 2025-09-18 上传 | 大小:1.1mb | 下载:0
[VHDL编程] VHDLBhasker
说明:ebook HAVING ALL DETAILS CHEPTERS OF J BHASKER-ebook HAVING ALL DETAILS CHEPTERS OF J BHASKER<pardeep> 在 2025-09-18 上传 | 大小:2.61mb | 下载:0
[VHDL编程] Seven_code_translator
说明:七段译码显示,Verilog HDL实现-Seven segment decoder display, Verilog HDL implementation<geraint> 在 2025-09-18 上传 | 大小:106kb | 下载:0
[VHDL编程] XilinxISEDesignSuite12.3Tutorial
说明:最新Xilinx ISE12.3 开发环境使用指南-The Guide of the latest Development environment for Xilinx ISE12.3<胡国平> 在 2025-09-18 上传 | 大小:1.35mb | 下载:0
[VHDL编程] vhdlsourcecode
说明:some vhdl sourcecode,just for freshmen to read<chenjiada> 在 2025-09-18 上传 | 大小:41kb | 下载:0
[VHDL编程] virtex5
说明:Virtex® -5 devices are configured by loading application-specific configuration data—the bitstream—into internal memory. Because Xilinx FPGA configuration memory is volatile, it must be configured each time it is powered-up. The bitstream is l<leilei> 在 2025-09-18 上传 | 大小:1.51mb | 下载:0
[VHDL编程] fifo_chipscope
说明:学习FIFO的初级资料,代码工程在ISE10.1上运行,还有在线示波器chipscope的步骤指导哦!-Study of the primary data FIFO, the code works ISE10.1 run, there is scope chipscope step online guide Oh!<nikis> 在 2025-09-18 上传 | 大小:3.15mb | 下载:0