[VHDL编程] lab_instructions1

说明：The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.-The objective of the labs today is
<Gopi> 在 2025-06-21 上传 | 大小：1.13mb | 下载：0

[VHDL编程] lab_instructions2

说明：The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.-The objective of the labs today is
<Gopi> 在 2025-06-21 上传 | 大小：2.14mb | 下载：0

[VHDL编程] lab_instructions3

说明：The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.-The objective of the labs today is
<Gopi> 在 2025-06-21 上传 | 大小：1mb | 下载：0

[VHDL编程] Spartan-3ADSPs

说明：The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.-The objective of the labs today is
<Gopi> 在 2025-06-21 上传 | 大小：1016kb | 下载：0

[VHDL编程] keyboard

说明：键盘功能的实现，主要用来显示键盘上所恩下的键对应的数字-keyboard
<num1> 在 2025-06-21 上传 | 大小：561kb | 下载：0

[VHDL编程] duogongneng

说明：多功能波形放生器，产生三种波。方波。。j锯齿波。。正弦波 -Release device function waveform, resulting in three waves. Square wave. . j ramp. . Sine wave
<唐忠> 在 2025-06-21 上传 | 大小：7kb | 下载：0

[VHDL编程] AlteraFPGA

说明：FPGA原理图，可以用作最小FPGA系统的制作-FPGA schematics, can be used for the production of the smallest FPGA system
<dsw> 在 2025-06-21 上传 | 大小：1.64mb | 下载：0

[VHDL编程] verilogHDL

说明：verilog HDL 的课件，东南大学的课件，具有学习价值-verilog HDL courseware, Southeast University, courseware, a learning value
<dsw> 在 2025-06-21 上传 | 大小：582kb | 下载：0

[VHDL编程] shuzidianlu

说明：基于fpga的数字电路可程设计，一个乒乓球游戏机。可以算人对打，5局三胜-Fpga based digital circuit design process, a table tennis game. Operators who can rally, winning three out of 5
<付友> 在 2025-06-21 上传 | 大小：113kb | 下载：0

[VHDL编程] chuankoumokuai

说明：用VERILOG实现的串口RS232自收发模块，以通过板级测试。-RS232 serial port with the VERILOG achieve self-transceiver module, through board-level test.
<闫碎猴> 在 2025-06-21 上传 | 大小：8kb | 下载：0

[VHDL编程] sramceshi

说明：用VERILOG编写的测试SRAM代码，已通过板级测试，完整无误-SRAM with the VERILOG code written test, have passed the board-level test, complete and correct
<闫碎猴> 在 2025-06-21 上传 | 大小：5kb | 下载：0

[VHDL编程] VGAzifuxianshi

说明：用VERILOG编写的VGA字符显示，可以在电脑屏幕上显示字符,已通过测试-Prepared with the VERILOG VGA character display, can display characters on a computer screen, has been tested
<闫碎猴> 在 2025-06-21 上传 | 大小：8kb | 下载：0