资源列表
[VHDL编程] Intelligence-contest-for-vies
说明:智能竞赛抢答器的FPGA实现,包括设计要求,设计思路,设计源代码,设计仿真结果。-Responder Smart contest the FPGA implementation, including design requirements, design ideas, design source code, design and simulation results.<csh> 在 2025-06-25 上传 | 大小:192kb | 下载:1
[VHDL编程] Traffic-light-controller-design
说明:交通灯的FPGA实现, 包括设计要求、设计思路方案、设计源代码、仿真结果。-FPGA implementation of traffic lights, including design requirements, program design ideas, design source code, the simulation results.<csh> 在 2025-06-25 上传 | 大小:92kb | 下载:0
[VHDL编程] 35_bit_pack
说明:hiiiiiSystem will automatically delete the directory of debug and release, so please do not put files on these two directory<Puneet> 在 2025-06-25 上传 | 大小:1kb | 下载:0
[VHDL编程] uart-(VHDL)
说明:利用VHDL语言实现的UART串口通讯,以经过下载验证-the UART program with VHDL as develop language<艾顺义> 在 2025-06-25 上传 | 大小:11kb | 下载:0
[VHDL编程] MIT.Press-.Circuit.Design.with.VHDL.(2004).TLF.ra
说明:This book is a good reference for VHDL Programming. this book is divided into two parts Circuit Design and System Design<othmanip> 在 2025-06-25 上传 | 大小:4.81mb | 下载:0
[VHDL编程] RS232_FIR
说明:Quartus II was a development tool of CPLD / FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: a<jay> 在 2025-06-25 上传 | 大小:198kb | 下载:0
[VHDL编程] SerivalPC1
说明:用VHDL编写的单片机与串口的通信,通过调试,波特率为9600,在串口调试助手能看到相应的结果-Prepared with the VHDL serial communication between MCU and, through the commissioning, the baud rate is 9600, the serial debugging assistant can see the results of the corresponding<lidejjj> 在 2025-06-25 上传 | 大小:589kb | 下载:0