文件名称:asynch_fifo

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 1004kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • ali***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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FPGA VERILOG 用DCFIFO实现 跨时钟域的数据传输,已验证,直接可用-FPGA VERILOG using DCFIFO realize cross-clock domain data transfer, has been verified, directly available
相关搜索: fifo
dcfifo
testben
fpga
fifo

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下载文件列表

asynch_fifo

...........\asynch_fifo

...........\...........\asyn_fifo.asm.rpt

...........\...........\asyn_fifo.done

...........\...........\asyn_fifo.eda.rpt

...........\...........\asyn_fifo.fit.rpt

...........\...........\asyn_fifo.fit.smsg

...........\...........\asyn_fifo.fit.summary

...........\...........\asyn_fifo.flow.rpt

...........\...........\asyn_fifo.map.rpt

...........\...........\asyn_fifo.map.smsg

...........\...........\asyn_fifo.map.summary

...........\...........\asyn_fifo.pin

...........\...........\asyn_fifo.pof

...........\...........\asyn_fifo.qpf

...........\...........\asyn_fifo.qsf

...........\...........\asyn_fifo.sim.rpt

...........\...........\asyn_fifo.sof

...........\...........\asyn_fifo.tan.rpt

...........\...........\asyn_fifo.tan.summary

...........\...........\asyn_fifo.v

...........\...........\asyn_fifo.v.bak

...........\...........\db

...........\...........\..\altsyncram_3nu.tdf

...........\...........\..\altsyncram_9ve1.tdf

...........\...........\..\altsyncram_ebc1.tdf

...........\...........\..\altsyncram_to61.tdf

...........\...........\..\alt_synch_pipe_1e8.tdf

...........\...........\..\alt_synch_pipe_kv7.tdf

...........\...........\..\alt_synch_pipe_lv7.tdf

...........\...........\..\alt_synch_pipe_tdb.tdf

...........\...........\..\asyn_fifo.asm.qmsg

...........\...........\..\asyn_fifo.asm_labs.ddb

...........\...........\..\asyn_fifo.cbx.xml

...........\...........\..\asyn_fifo.cmp.bpm

...........\...........\..\asyn_fifo.cmp.cdb

...........\...........\..\asyn_fifo.cmp.ecobp

...........\...........\..\asyn_fifo.cmp.hdb

...........\...........\..\asyn_fifo.cmp.logdb

...........\...........\..\asyn_fifo.cmp.rdb

...........\...........\..\asyn_fifo.cmp.tdb

...........\...........\..\asyn_fifo.cmp0.ddb

...........\...........\..\asyn_fifo.cmp2.ddb

...........\...........\..\asyn_fifo.db_info

...........\...........\..\asyn_fifo.eco.cdb

...........\...........\..\asyn_fifo.eda.qmsg

...........\...........\..\asyn_fifo.eds_overflow

...........\...........\..\asyn_fifo.fit.qmsg

...........\...........\..\asyn_fifo.hier_info

...........\...........\..\asyn_fifo.hif

...........\...........\..\asyn_fifo.map.bpm

...........\...........\..\asyn_fifo.map.cdb

...........\...........\..\asyn_fifo.map.ecobp

...........\...........\..\asyn_fifo.map.hdb

...........\...........\..\asyn_fifo.map.logdb

...........\...........\..\asyn_fifo.map.qmsg

...........\...........\..\asyn_fifo.map_bb.cdb

...........\...........\..\asyn_fifo.map_bb.hdb

...........\...........\..\asyn_fifo.map_bb.hdbx

...........\...........\..\asyn_fifo.map_bb.logdb

...........\...........\..\asyn_fifo.pre_map.cdb

...........\...........\..\asyn_fifo.pre_map.hdb

...........\...........\..\asyn_fifo.psp

...........\...........\..\asyn_fifo.root_partition.cmp.atm

...........\...........\..\asyn_fifo.root_partition.cmp.dfp

...........\...........\..\asyn_fifo.root_partition.cmp.hdbx

...........\...........\..\asyn_fifo.root_partition.cmp.logdb

...........\...........\..\asyn_fifo.root_partition.cmp.rcf

...........\...........\..\asyn_fifo.root_partition.map.atm

...........\...........\..\asyn_fifo.root_partition.map.hdbx

...........\...........\..\asyn_fifo.root_partition.map.info

...........\...........\..\asyn_fifo.rpp.qmsg

...........\...........\..\asyn_fifo.rtlv.hdb

...........\...........\..\asyn_fifo.rtlv_sg.cdb

...........\...........\..\asyn_fifo.rtlv_sg_swap.cdb

...........\...........\..\asyn_fifo.sgate.rvd

...........\...........\..\asyn_fifo.sgate_sm.rvd

...........\...........\..\asyn_fifo.sgdiff.cdb

...........\...........\..\asyn_fifo.sgdiff.hdb

...........\...........\..\asyn_fifo.signalprobe.cdb

...........\...........\..\asyn_fifo.sim.cvwf

...........\...........\..\asyn_fifo.sim.hdb

...........\...........\..\asyn_fifo.sim.qmsg

...........\...........\..\asyn_fifo.sim.rdb

...........\...........\..\asyn_fifo.sld_design_entry.sci

...........\...........\..\asyn_fifo.sld_design_entry_dsc.sci

...........\...........\..\asyn_fifo.smp_dump.txt

...........\...........\..\asyn_fifo.syn_hier_info

...........\

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