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dds
- fpga利用dds原理，产生正弦波，简单实用，成本低-fpga using dds principle, have a sine wave
DDS
- FPGA实现直接数字频率合成（DDS），使用EP1C3T144C8通过调试-Cyclone,aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
dds
- DDS文件夹内的程序，完成直接数字频率合成功能,有正弦,三角,方波三种波形,并能扫频. 可通过键盘操作设置频率参数和选择波形种类和控制运行. 由两部分组成,"C"文件夹内,是用于在 51 单片机上运行的 C语言程序, "Verilog"文件夹内,是用Verilog语言编写的 FPGA 程序-ewfreytrgrwf reggwrter rgterthhrgdfs rgdgf egrthg rgreaf rtgerf srfefsf fr
DDS
- 基于dds的函数发生器和基于matlab的扫雷游戏-Dds-based function generator and the mine-based game matlab
dds(heli)
- DDS用verilog 实现，可以实现方波、正弦和三角-DDS using verilog realized, can be square wave, sinusoidal and triangular
DDS
- 用DE2开发板做的DDS程序，频率分辨率可以达到1Hz！-DE2 development board to do with the DDS process, the frequency resolution can be achieved 1Hz!
DDS
- dds 正弦信号发生器步进100HZ 最高频率可达900kHZ 最低频率可大2.3Khz-dds signal generator sin walingbeam 100HZ
DDS
- 基于DDS原理的几种信号发生器的设计的几篇论文，使用FPGA平台或者FPGA和PC共同平台实现-DDS-based signal generator several principles of design, the use of FPGA or FPGA platform and a common platform PC
dds
- 基于FPGA的DDS设计，本程序采用verilog HDL语言编写，使用DDS+Pll倍频-The DDS-based FPGA design, the procedures used verilog HDL language, the use of DDS+ Pll frequency
dds
- 如何利用FPGA产生DDS调频信号 很具体的-How to make use of DDS generated FM signal FPGA specific
DDS
- 我们小组共了一个月做的DDS,程序核心用的是Verilog HDL,有仿真波形,输出正弦波,方波,及三角波,步进可调.频率范围1HZ--10MHZ-Our group for a month to do a total of DDS, the procedure is used in the core of Verilog HDL, there are simulation waveform, the output sine wave,
FPGA-DDS-FM
- DDS 调频信号发生器框图设计原理，有仿真测试结果-DDS signal generator FM Design Principle diagram
DDS
- 基于quartus的DDS，可以发生正弦波，方波，三角波，附带了顶层文件，注释在程序中-Quartus on the DDS, can occur sine wave, square wave, triangle wave, with the top-level documents, notes in the procedure
DDS
- 基于Verilog的dds设计，已经经过调试，可直接使用-Dds of Verilog-based design, has been testing can be used directly
dds
- 用VERILOG语言实现的dds(直接数字频率合成器)-VERILOG language with the dds (DDS)
DDS
- 基于EPM7128的数字合成信号发生器（DDS）设计。通过对EPM7128编程，组合出地址累加器、数据锁存器、256*8位ROM空间。外接DA可实现正弦波输出功能-EPM7128-based signal generator for digital synthesis (DDS) design. EPM7128 through programming, the combination of address accumulator, da
dds
- 这是用ALTERA里的DSP BUILDER里做的DDS模块，可以在EP1C20400里下载并通过SIGNAL TAP进行在线测试。-It is used inside the DSP BUILDER where ALTERA do DDS module, you can download a EP1C20400 through SIGNAL TAP-line testing.
dds
- dds信号发生系统 有电路图和程序 希望对大家有帮助-dds signal circuit system and procedures, we hope to help
DDS
- 基于FPGA的DDS程序，可产生任意频率任意相位的波形-FPGA-based DDS program, can generate any frequency arbitrary waveform phase
FPGA-DDS
- 在FPGA内，以查表方式实现频率直接合成器（DDS）功能。verilog源代码-In the FPGA in order to achieve the look-up table means the direct synthesizer frequency (DDS) feature. verilog source code