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arm7_core_design
- arm7内核的verilog代码,可以综合,虽有几条指令没有实现,但已实现的功能对理解arm体系结构已足够-ARM7 core Verilog code can be integrated, although some commands do not realize, it has been achieved in understanding the functional architecture has enough arm
S3C2410Core
- 2410核心板的pcb电路图,具有很好的参考价值,方便学习arm的朋友。-2410 core pcb circuit board with a good reference value, to facilitate learning arm friends.
CF_card_base_on_NiosII
- 基于NIOS的CF卡应用(包括了软件和硬件),ALTERA的IP库中只提供了底层的硬件寄存器描述头文件.这是个基于IP核HAL的软件,以及相应的硬件设计示例.-NIOS based on the CF card applications (including the software and hardware), ALTERA the IP library provides only the bottom of the first do
uart16550.tar
- uart16550 ip core 通用异步收发器vhdl源代码-uart16550 ip core UART VHDL source code
StackWalker
- Stack walker for get call stack information especially in case of your program core dump on customer site with the release version without any debug information
hgb_pci_host
- 内有一PCI 主 和PCI从,PCI TARGET 都是公开代码的,是工程文件,有仿真工程,使用说明。觉得好的就推荐一下。 本PCI_HOST目前支持: 1、 对目标PCI_T进行配置; 2、 对目标进行单周期读写; 3、 可以工作在33MHZ和66MHZ 4、 支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的!!!软件里面调试仿真了半天,终于调通了,到了下载就突然弹出窗口说包含了有限制
OC8051
- Verilog版的C51核(OC8051)-Verilog version of the C51 core (OC8051)
DW8051
- Verilog版的C51核(DW8051)-Verilog version of the C51 core (DW8051)
java-core
- 精通java核心技术》随书源代码,学习编程的好帮手,-Proficient in the core java technology with the book source code, learn about programming a good helper,
00011ipcore51
- 51内核单片机的VHDL语言的实现,从功能到编译都有详细说明,包括源码-51-core single-chip realization of the VHDL language, from the function to compile a detailed descr iption, including source
corejava7
- core java version 7, source code
corejava8
- core java verion 8 source code
sha1_v01
- SHA-1加密算法的IP核,内涵文档,仿真测试文件-SHA-1 encryption algorithm of the IP core, the connotation of documents, simulation test file
usb20_ipcore_usb_funct
- usb的芯片ip core. 用HDL描述,适合asic/fpga人员参考或使用。USB ip core for ASIC/FPGA designers.-usb chips ip core. with HDL descr iption suitable for asic/fpga staff reference or use. USB ip core for ASIC/FPGA designers.
FIS_code
- 用C语言写的一个指纹识别系统。这是其中的主要核心代码-Using C language to write a fingerprint identification system. This is one of the main core code
sls_sram_16_bit
- altera NIOS软核系统中构建外接SRAM接口的例子-altera NIOS soft-core system to build external SRAM interface example
yc2440-core
- yc24440核心版原理图,pdf格式,可以做设计参考,ARM9-Schematic yc24440 core version, pdf format, you can do a design reference, ARM9
ImplementationofFPGAconfiguration
- 基于ARM 微控制器配置FPGA 的实现 摘 要:介绍了基于ARM 内核的ATMEL AT91FR4081 微控制器以J TAG 的ISP 方式配置XILINX XC2S150PQ208 FPGA 的实现过程。这是一种灵活和经济的FPGA 的配置方法。介绍了ISP 和J TAG 的原 理、系统实现的流程、硬件电路设计、J TAG 驱动算法的实现和配置时间的测试结果。-ARM-based microcontroller to
8051core
- 8051 VHDL IP Core,有兴趣的可以-8051 VHDL IP Core, who are interested can
SPI_verilog_vhdl
- SPI串口的内核实现(分别使用verilog和vhdl语言描述的)-The core of the realization of SPI serial port (using Verilog and VHDL language descr iption of the)