搜索资源列表
mlite.tar
- Plasma IP Core 你可以利用这个组件在FPGA中设计MIPS结构的CPU -Plasma IP Core You can use this component in FPGA design the structure of MIPS CPU
MIT_MIPS_Core.tar
- 麻省理工的一个实验室实现的MIPS IP CORE，可以在FPGA上跑通 -a Massachusetts Institute of Technology laboratory achieved MIPS IP CORE, the FPGA can run on Link
CoreJAVA_7th_Edithon_Code
- Core java 7th source codes
DCTofJPEG
- 用verilog代码写的JPEG压缩核心模块DCT变换之蝶形单元算法-verilog code written using JPEG compression core module DCT's butterfly modules algorithm
core
- Core War: 这是我给他命的名。 形容起来比较复杂。 玩一下就知道了:P. -Core War : This is my life to him by name. Describe more complicated. Play with will know : P.
complex_filter_pfile
- 指纹core点检测程序3(complex_filter), matlab demo code-fingerprint detection procedures core 3 (complex_filter) Matlab demo code
8051core_vhdl
- 8051的内核(vhdl) This is version 1.1. of the MC8051 IP core. 在FPGA上运行.供有精力的人研究.-8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation. have the energy for the study.
corejava
- 这是《core java》第七版的程序源代码，相信一定会对大家有帮助。同时对于从事java工作或学习的人同样推荐这本书。-This the "core java," the seventh edition of the source code, I believe that would be helpful. Meanwhile, java engaged in work or study the same rec
mc8051-VHDL
- VHDL实现 8051 CPU核 Oregano Systems 8-bit Microcontroller IP-Core-VHDL 8051 CPU nuclear Oregano Systems 8-bit Mic rocontroller IP-Core
8051core-Verilog
- 利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware descr iption language of the people to see!
core
- X.264的core代码 包括，VLC可变长编码，帧间预测，环路滤波等-X.264, including the core code, VLC variable length coding, interfr a me prediction, loop filtering
core
- 蓝海微芯ARM开发板核心板原理图,采用s3c2410处理器-BlueOcean Chipscreen ARM development board core board schematic diagram, using S3C2410 processor
ps2_keyboard
- 这是一个使用ps2 ip core的范例，读取键盘输入并显示-This is a used ps2 ip core example, to read keyboard input and display
generic_avalon_sram
- 一个比较有参考价值的sram IP核，对SOPC感兴趣的人士有一定的指导意义！该程序是采用avalon总线，可以直接内嵌进SOPC Builder。-A comparison reference value has sram IP core, on the SOPC interested people have a certain guide! The procedure is used avalon bus, can be direc
aes
- AES Core Modules In this document I describe components designated to encoding and decoding using AES. aes enc — parametrizable component which can encrypt input data, using 128, 192 and 256 bit key, • aes d
Lib
- M*core开发库文件,能够大大减轻开发者的难度-M* core development library files, developers can greatly reduce the difficulty of
RISC_Core.ZIP
- 这是一篇关于8位RISC CPU设计的文章，其中包含了用Verilog语言编写的CPU内核程序-This is an 8-bit RISC CPU on the design of the article, which includes using the Verilog language CPU core procedures
C51_PLC_source
- 以atmel AT89C51为核心的超小型PLC源代码-Atmel AT89C51 to as the core of the ultra-small PLC source code
j2eecorepatterns
- j2ee core patterns english version
DW8051_2
- DW8051 高速8051 IP Core, 本人測試過完全100％ 正常.-DW8051 High-Speed 8051 IP Core, I tested 100 percent completely normal.