搜索资源列表
8-bit-risc-in-vhdl.vhd
- risc processor in vhdl
RISC-ARM
- RISC 架构下的ARM 微处理器应用研究,:该文主要介绍了当下流行的嵌入式系统的RISC 架构下微处理器ARM,分析ARM 微处理器适应嵌入式系统的特点和它的相关产品适用的领域及其广阔的发展前景-Under the fr a me of RISC ARM microprocessor application research, : it introduces the current popular embedded system un
RISC-CPU-design
- 16位RISC-CPU设计,高四位为操作码,低12位为地址,寻址空间位4KB。包含12条指令(预设16条指令),3个基本测试文件及其Modelsim仿真结果。-16-bit RISC-CPU design, the high four bits for the opcode, the lower 12 address, the address space of 4KB. Consists of 12 instructions (defa
risc
- RISC是一种执行较少类型计算机指令的微处理器,起源于80 年代的MIPS主机(即RISC 机),RISC机中采用的微处理器统称RISC处理器。这样一来,它能够以更快的速度执行操作(每秒执行更多百万条指令,即MIPS)。因为计算机执行每个指令类型都需要额外的晶体管和电路元件,计算机指令集越大就会使微处理器更复杂,执行操作也会更慢。 -RISC is a microprocessor performs fewer types of c
RISC---8
- 集成RISC-CPU芯片设计,很实用的程序,对初学FPGA的同学有很大的帮助奥-Integrated RISC-CPU chip design, very practical program, beginner FPGA classmates help Austrian
Simply-RISC-M1-Core.tar
- Simply RISC M1 Core.tar
1632-bit-RISC-processor-S3C2410A
- 16/32位RISC处理器S3C2410A-16/32-bit RISC processor S3C2410A
btcx-risc
- bt848/bt878/cx2388x risc code generator.
RISC-CPU
- 精简指令集RISC-CPU 可以实现阶乘运算 verilog代码编写 含有测试平台-Reduced instruction set RISC-CPU test platform can implement written in the factorial operator verilog code contains
cpu-risc
- wb_switch,cpu设计,精简指令cup设计-wb_switch,opencore,risc cpu design。
RISC-CPU
- 精简指令集 CPU 通过仿真验证正确 (使用之前务必看readme文件,和结构图!) 1. 此cpu是夏宇闻 verilog数字系统设计教程中最后一章的例程。 2. 学习时务必先搞明白框图原理,和数据流动!!! 3. 牢记主状态机中一条指令周期中传输的16bit=3bit指令+13bit地址。 4. 理解数据总线,和地址总线。区分数据和地址。 5. 仔细调试,因为书中有很多小错误。 程序经过quartu
PIC16F5X-RISC
- PIC16F5X-大型RISC处理器-代码实现集合,其中包含工程,说明文档-PIC16F5X-Large RISC processor- code set, which includes engineering, documentation
risc-4-way-lru-processor-verilog
- A RISC processor written in verilog codes.
pipeline-RiSC
- Pipelined RiSC with testbench
Mini-Risc-core
- 这个源码是RISC型CPU处理器,正常动作,给很大帮助想做CPU处理器的人。-This is a Mini-RISC CPU/Microcontroller that is mostly compatible with the PIC 16C57 Microchip.
RISC-CODE
- Design and Implementation of 16 Bit RISC Processor
RISC-CPU
- 精简指令集 16位流水线CPU 可实现硬件模拟-16-bit pipelined RISC CPU hardware emulation can be achieved
RISC-vs-SISC
- A good descr iption of RISC and CISC approaches.
32-bIT-RISC-DOC-a4
- it is 32 bit risc processor code in vhdl
32-bit-RISC
- 基于MIPS指令集的32位RISC处理器逻辑设计的论文,讲的非常详细适合初学者学习。-32-bit RISC processor logic based on MIPS instruction set design paper, speak very detailed is suitable for beginners to learn.