搜索资源列表
uartin
- 串口通信，实现数据的串并转换，以及并串转换-Serial communication, serial and parallel data conversion, and parallel to serial conversion
OFDM
- 基于对比BPSK系统的OFDM仿真结果分析,把N个子载波上的传输符号通过IFFT，然后并串转换后传输，在接收端通过串并转换后再进行FFT变换-BPSK OFDM system based on comparative analysis of simulation results, the N sub-carrier transmission symbols by IFFT, and the string conversion and t
ser_para
- 用verilog语言来实现并串转换模块，并行输入八个10位，串行输出一个10位。-achieve and serial converter module verilog
p-to-s
- 采用VHDL语言编制的并串转换程序，大家看看吧-Prepared using VHDL language and string conversion process, we look at it
parallel-to-serial-conversion
- 该模块实现的是并串转换功能，经过仿真验证没有问题-This module is designed to implement parallel to serial conversion
zhuan
- 一个关于串并和并串转换的verilog的工程，代码简洁易懂-this is a sample program project for transformation
hc595
- HC595并串转换程序，Verilog语言编写，经过硬件平台测试-HC595 and string conversion process, Verilog language, after testing the hardware platform
123
- 4位并串转换器，VHDL实现。希望给大家提供参考和帮助，其中可能存在商榷位置处。-It is good sample,hope help others.
bis
- 这是个并串转换的程序，用vhdl编写，希望对大家有用。-This is a string and the conversion process, using vhdl write, want to be useful.
p2s
- verilog语言实现的并串转换，适用于quartus环境-the verilog language and string conversion for quartus environment
ADzhuanhuanmokuaisheji
- ad转换模块设计，在模数转换中重要作用，由FPGA控制，分频、串并及并串转换等-ad conversion module design, analog to digital conversion in an important role in
conver
- 非常详细,通俗易懂的并串转换电路得设计,为大家提供思路-very in detail,understandable circuit source
piso10
- 很有用的10bit并串转换程序，在quartus上已验证过，需要的可以拿去-10bit and useful string conversion process has been verified in quartus need to take to use with
ofdm-fangzhen
- OFDM 的仿真程序，包括调制，并串转换，ifft，并串，加前缀，fft，解调，-OFDM simulation program, including modulation, parallel to serial conversion, ifft, and string, prefix, fft, demodulation,
I2S
- 此设计主要是完成音频I2S格式数据流的串并转换和并串转换,用VHDL描述-This design is to complete the audio I2S format data stream serial to parallel conversion and parallel to serial conversion in VHDL
para_serial
- 利用Verilog语言实现串并转换和并串转换，方便CPU和单片机之间通信 -Verilog to implement a serial-to-parallel conversion and parallel-to-serial conversion, to facilitate communication between the CPU and the microcontroller
multiplex
- 四路信息时分复用和解复用，包含串并转换，并串转换，提取帧同步，分频，移位寄存器。-Quad information time-division multiplexing and demultiplexing, contains the string conversion, parallel-serial conversion, extracting the fr a me synchronization, frequency divis
ps_transfer
- verilog HDL语言编写的8位并串转换，使用状态机实现可综合-Using verilog HDL language realize parallel-to-serial conversion, using the state machine to achieve ，can comprehense
parallel8_serial
- V5 FPGA中8:1并串转换输出，可供初学者参考设计，涉及 OSERDES 原语的使用-the use of "OSERDES"
para2serial
- 并串转换模块，用于serdes编码器后面的部分，转换后用于LVDS发送。-And string conversion module, part of the back of the encoder for serdes, after conversion to LVDS transmitter.