搜索资源列表
VHDL-vga_core(vhdl)
- VHDL-vga_core(vhdl).rar FPGA上实现 VGA的IP（VHDL）-VHDL-vga_core (vhdl). RarFPGA realize VGA on the IP (VHDL)
crc_verilog_xilinx
- crc校验，非常好用，是从Xilinx的IP演化来的-crc脨 拢 脩茅 拢 卢 脟 鲁 拢 潞 脙脫脙 拢 卢 脢脟
8051core-Verilog
- 利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware descr iption language of the people to see!
NCO_ip
- NCO的VHDL程序，是利用IP核生成的，超好的，快下吧-NCO of the VHDL process is the use of nuclear-generated IP, super good, fast, are you
8051core-Verilog
- 这里有verilog编写的8051ipcore 谁要啊?-Verilog prepared here has 8051ipcore who ah?
DCT_verilog
- 一个比较有参考价值的8*8DCT变换，对图像处理感兴趣的人士有一定的指导意义！该程序是用dspbuilder编写的。-Have a reference value of 8* 8DCT transform, the image of interest to deal with people who have some guiding significance! The program is prepared dspbuilder.
8251
- 8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.
DE2_Default
- DE2开发版的默认程序，verilog，里面对各个模块都进行了控制，而且程序非常规范，值得学习-DE2 development version of the default proceedings, verilog, inside of each module have been controlled and standardized procedures, it is worth learning
cpu
- 精简指令cpu，用verilog编写，详细的教程-RISC cpu, using Verilog prepared and detailed tutorial
sine
- 用verilog语言编的正弦波发生器，可以用QuartusII来打开这个源码，也可以转换成VHDL语言-Verilog language prepared by the sine wave generator can be used QuartusII to open the source code can also be converted into VHDL language
mp3_decoder
- mp3VHDL语言程式，这是一个关于mp3 播放的程序的程序，是我从同学那里拷过来的，试了一下-mp3VHDL language program, this is a mp3 player on the procedure that I copy over from the students there, and try a bit
iic
- iic 总线 verilog 源代码 标准i2c总线， 有sda scl 时钟，频率自定-IIC bus standard Verilog source code i2c bus, has sda scl clock, the frequency of self-
fd
- 这是一个键盘防抖动的C程序。该防抖动程序采用计数器型，简单，稳定，省资源。-This is a keyboard防抖动the C program. The procedures used防抖动counter type, simple, stable, provincial resources.
ps2_verilog
- ps2_键盘控制器源码verilog源码，是一个不错的代码-ps2_ keyboard controller Verilog source code, is a good code
vga_lcd
- 这个是VGA的核是NOIS开发时使用的IP CORES 在FPGA的开发中使用的比较多-This is a VGA Nois nuclear development is the use of IP CORES in the FPGA used in the development of more
fir
- Verilog 程序， 实现4阶 fir-filter滤波器。 -Verilog procedures, to achieve 4-order filter fir-filter.
SPI_Code(Verilog)
- SPI总线硬件描述语言Verilog下的实现，含主模式和从模式的实现，经过仿真验证，可作为一个单独的模块使用-SPI bus under the Verilog hardware descr iption language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate modu
vspi
- SPI的verilog实现，非常的全面和详细，还带有spi算法的注解！-SPI s Verilog realization, very comprehensive and detailed, but also with the annotation algorithm spi!
Verilog
- FPGA verilog，比较好的verilog源码，现提供给大家，供参考-FPGA verilog, better Verilog source code is now available to everyone, for reference