资源列表

« 1 2 ... .03 .04 .05 .06 .07 2008.09 .10 .11 .12 .13 ... 4310 »

[VHDL编程AD

说明:基于EP1C6Q240的AD转换代码,新手易懂-The AD converter based EP1C6Q240 code, novice to understand
<> 在 2025-06-08 上传 | 大小:333kb | 下载:0

[VHDL编程counter

说明:基于EP1C6Q240的计数器设置,简单易懂,调试通过-Counter EP1C6Q240 based settings, easy to understand, debug through
<> 在 2025-06-08 上传 | 大小:1.78mb | 下载:0

[VHDL编程DA

说明:基于EP1C6Q240的DA转换程序代码,简单易懂,调试通过,基于quartus 6.0-The DA conversion based EP1C6Q240 code, easy to understand, debug through, based on quartus 6.0
<> 在 2025-06-08 上传 | 大小:206kb | 下载:0

[VHDL编程FREQ

说明:基于EP1C6Q240的频率计设计,简单易懂,调试通过,基于quartus6.0-Based on the frequency meter EP1C6Q240 design, easy to understand, debug through, based on quartus6.0
<> 在 2025-06-08 上传 | 大小:218kb | 下载:0

[VHDL编程LED

说明:基于EP1C6Q240的流水灯设计,简单易懂,调试通过,基于quartus6.0-The water-based EP1C6Q240 light design, easy to understand, debug through, based on quartus6.0
<> 在 2025-06-08 上传 | 大小:244kb | 下载:0

[VHDL编程LOCK

说明:基于EP1C6Q240的密码锁设计,简单易懂,调试通过,基于quartus6.0-Based on EP1C6Q240 password lock design, easy to understand, debug through, based on quartus6.0
<> 在 2025-06-08 上传 | 大小:407kb | 下载:0

[VHDL编程MOTOR

说明:基于EP1C6Q240的步进电机设计,简单易懂,调试通过,基于quartus6.0-EP1C6Q240 stepper motor based design, easy to understand, debug through, based on quartus6.0
<> 在 2025-06-08 上传 | 大小:280kb | 下载:0

[VHDL编程rs232c

说明:基于EP1C6Q240的串口rs232通信程序代码设计,简单易懂,调试通过,基于quartus6.0-Serial rs232 communication based EP1C6Q240 code design, easy to understand, debug through, based on quartus6.0
<> 在 2025-06-08 上传 | 大小:360kb | 下载:0

[VHDL编程ep2c35_4_9_motor

说明:FPGA的电机控制程序,可对电机进行PWM的控制-it is writen by VHDL,the program generate PWMs to control the motor
<Nevin Young> 在 2025-06-08 上传 | 大小:81kb | 下载:0

[VHDL编程ep2c35_3.14_beep

说明:FPGA用于产生蜂鸣器的verilog程序,可以下到FPGA开发板上进行实验。-this program is writen by verilog . it is used to trigger the beep which is in the FPGA s develop board
<Nevin Young> 在 2025-06-08 上传 | 大小:48kb | 下载:0

[VHDL编程ep2c35_4_15_signal_generator

说明:这个程序由verilog语言编写。用来在FPGA内产生各种常用信号,如方波。-This program is writen by verilog HDL.it is for generate waves in FPGA
<Nevin Young> 在 2025-06-08 上传 | 大小:138kb | 下载:0

[VHDL编程ep2c35_3.8_full_add

说明:这个程序用verilog硬件语言编写。用来在FPGA内实现全加器。并且可以将输出显示在外部LED灯上等。-this program is writen by verilog HDL.it is the full adder for FPGA.users can read the result from the LEDs.
<Nevin Young> 在 2025-06-08 上传 | 大小:49kb | 下载:0
« 1 2 ... .03 .04 .05 .06 .07 2008.09 .10 .11 .12 .13 ... 4310 »

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