搜索资源列表
67506232
- 8位加法器的原代码,主要内容下载看了就知道-8-bit adder of the original code, the main contents of Download read on to know
adder_n_bits
- vhdl entity adder of two words of nbits.
sumador_n_bit_con_cin
- adder of nbits with carry in
adder4
- 四位加法器，适合初学者学习使用，包括实验要求，四位加法器程序代码，QuartusII功能仿真后的波形图。-Four adder, suitable for beginners learning to use, including the experimental requirements, the four code adder, QuartusII functional simulation of the wave after.
chengfa
- 我做的组成原理课程设计！用VHDL实现加法树的乘法。-I do the composition of the principle of curriculum design! VHDL adder tree used to achieve multiplication.
fulladder4
- VHDL图形文件实现的4位全加器，希望对大家有用！-VHDL graphics files to achieve four full adder, in the hope that useful!
add
- 采用VHDL语言写的ADD加法器，并有原理图式-VHDL language used to write the adder ADD and the principle of schema
2
- 多字节二进制数的加法。加数首地址由30H 给出，被加数和结果的存储单元首地址 由31H 给出，字节数由32H 给出。 、多字节二进制的减法。减数首地址由30H 给出，被减数和结果的存储单元首地址由 31H 给出，字节数由32H 给出。 将16 个单字节带符号数按由大到小的顺序排列。排列前数列保存在30H～3FH 中， 排列后保存在40H～4FH 中。（提示：先判断正负）-The number of multi-byt
vhdl
- full adder is implemented using VHDL
FullAdderusingHalfAdder
- full adder project conating source code and simulation results.
AddMatrix
- 可以实现两个给定的三元组间的加法，自己编了好久的，提供大家参考参考-Can be achieved given the two groups of ternary adder, own for a long time, and provide your information
myadd32
- 32位全程加法器，可以进行移位操作及多位多输入多输出加减法-32-bit full adder, shift operations can be carried out and a number of multiple-input multiple-output addition and subtraction
waterline_adder
- 这是一个用Verilog编写的四级流水线加法器-This is a Verilog prepared with four pipeline adder
adder
- 实现译码的功能，如可以应用到交通等等日常生活设施中，实现指定的功能。-The realization of decoding functions, such as traffic, etc. can be applied to the daily life of facilities to achieve the specified function.
adder_2
- 这是一个加法器模块，实现用户所需要的加法功能-This is an adder module, the user needed to achieve additive function
Adder_Verilog
- 对于Verilog初学者非常实用的代码，帮助了解许多常用的加法器-Very useful for beginners Verilog code to help understand the many commonly used adder
8MLPF
- a pdk module used in dds system-dds phase adder
add_sub
- basu verilog codes for adder subtracor etc
HA
- half adder vhdl code
FA_4
- Full adder 4 vhdl code