搜索资源列表
FA_8
- Full adder 8 vhdl code
FA_16
- Full adder 16 vhdl code
FA_32
- Full adder 32 vhdl code
adder
- 4位二进制数比较器，将两个4位二进制数进行比较-4-bit binary comparator, two four binary comparison
xhjz
- protel99se格式的，信号加载调理电路，用与防止信号加载时短路，原理参加加法电路设计-protel99se format, the signal conditioning circuit load, the load signal and to prevent short circuit, the principle of participation in the design of adder circuit
adder16b
- 潘松那本书上用vhdl语言描述的16位并入并处加法器-Pan book vhdl language used to describe the 16-bit adder into his
traffic_lights
- Verilog语言3个程序，包括4位二进制的BCD码加法器，ALU位片，交通信号灯。既有源码也有word文档说明。-Verilog language three procedures, including 4-bit binary code of the BCD adder, ALU-bit chip, traffic lights. Only source documents that have word.
add_tree
- 本程序为加法树乘法器，计算16位读写地址，应用于LCD CSTN驱动芯片设计的SRAM的读写控制-This procedure for the adder tree multiplier, calculated 16-bit read and write address, used in LCD CSTN driver IC designed to control the SRAM s read and write
dds_first
- 用vhdl语言，通过加法器和寄存器实现fpga的dds功能-Using vhdl language, and register through the adder to achieve the fpga functional dds
counterjia23
- 一个最基础的23进制加法计数器，学习VHDL一定会遇到的。-One of the most 23 hexadecimal adder based counters, learn VHDL will be encountered.
chengfaqi
- 本乘法器最大的特点是将乘法器分解为数个加法器，这样节省了大量的逻辑资源-The greatest feature of this multiplier is to break down a number multiplier adder, so that the logic of saving a great deal of resources
half_adder
- 一个半加器，具有进位和位数相加的基本功能，可作为全加器的基本模块-One and a half adder with binary and the sum of the basic functions of the median, full adder can be used as the basic module
PPT
- 大学EDA课程的课件以及课后部分习题的程序。包括最基本的加法器、计数器、LED显示以及部分高级VHDL程序。-University of EDA software programs, as well as some after-school exercise procedures. Including the most basic adder, counter, LED display, as well as some high-lev
f_adder8
- fpga八位全加器(vhdl语言),由画图法制作,将八个一位全加器(由一位半加器组成)组合制成-fpga eight full adder (vhdl language)
add4
- 一个四位加法器的VHDL语言实现，并通过编译测试-A four-adder realization of the VHDL language, and compile test
FullAdderDesign
- Verilog Code For Full Adder
fpadd
- It is the floating point data type adder!
Csadder
- this carry saved adder-this is carry saved adder
1_ADDER
- 用vhdl编写的加法程序，很好，很实用，适用于初学者-Vhdl adder with the preparation of procedures, very good, very useful for beginners
22_deadlock
- 用vhdl编写的加法程序，很好，很实用，适用于初学者-Vhdl adder with the preparation of procedures, very good, very useful for beginners