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seg_led_rtl
- 使用FPGA控制数码管,在数码管上动态的显示数字,很使用,可以直接作为其他模块的子模块,直接调用-FPGA use of digital control in the digital tube dynamic display figures that use, direct module as other sub-module, called directly
pro001_buzzer
- 使用FPGA控制蜂鸣器的程序,用Verilog HDL设计,可以是蜂鸣器发出各种不同的声音-FPGA use buzzer control procedures, using Verilog HDL design, it is the buzzer sounded different voices
dds_quicklogic
- 高手写的VHDL源码，实现DDS跳频器功能 请大家多提意见-experts write VHDL source code, the frequency-hopping DDS functionality Please speak up
videodigitalsignalscontroller
- 用fpga技术实现基本的视频信号处理：主题程序；视频图象数据采集程序；sram的读写控制；测试程序-they simply use the basic technology of video signal processing : theme; Video data acquisition procedures; SRAM literacy control; test procedures
colorchange
- 用verilog hdl实现色彩空间转换，rgb到ycbcr-with Verilog HDL achieve color space conversion, rgb to RS
usb_ctr
- usb的verilog 代码。对理解usb的原理有很大帮助，并可以在nc环境下仿真。-usb the Verilog code. Usb to understand the principle is very helpful, and to be nc simulation environment.
USB2_chip
- USB2.0 chip的一部分verilog源码。opencore上下的，还比较好用:)-USB2.0 chip part of Verilog source. Opencore ish, but also better quality :)
Usb_RTL(VHDL_Verilog)
- USBRTL电路的VHDL和Verilog代码-USBRTL Circuit VHDL and Verilog code
RS232-for-vdhl
- RS232通讯VHDL源代码,MAXPLUS 2环境执行通过-RS232 communications VHDL source code, Segments 2 environment through implementation
generic_fifo
- 这是从opencores下的fifo代码,包括了异步和同步的,还有写的testbench,希望对大家有用.-This is opencores fifo under the code, including asynchronous and synchronous. There testbench written in the hope that useful for all.
statem
- 元件例化与层次设计，verilog 实例说明-components cases with the level of design, Verilog example
1091516677
- PCI总线仲裁参考设计Verilog代码-PCI bus arbitration reference design Verilog code
148个verilog hdl小程序（有很多testbench）——
- 148个verilog hdl小程序（有很多testbench）——.-148 Verilog HDL small programs (many testbench) from Part
Verilog_add4
- add4 verilog code -add4 Verilog code
dct_mac
- dct verilog code for image -Extra Verilog code for image
trafficontrol
- 使用verilog编写的交通灯控制程序，各方向通行时间可调，绿灯5s闪烁，在maxplus下调试通过，附仿真波形，在EP系列实验板上测试成功-use Verilog prepared by the traffic lights control procedures, the passage of time adjustable direction, green 5s flickered in maxplus under debuggin
i2c8
- I2c 总线测试程序,经过多次验证的.包括读写模式(第一次上传)-I2c bus testing procedures after several tested. Including reading and writing mode (the first uploading)
YCbCr_to_rgb
- 颜色空间转换代码,ycbcr对rgb的转换verilog代码.YCBCR的格式是ITU601格式.-color space conversion code, RS right rgb conversion Verilog code. YCBCR format is ITU601 format.
frame_decode_and_encode
- 一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典-Verilog prepared with a series of fr a mes, fr a mes and solutions yards speed matching procedures, rather classic!
WM8731
- 高品质音频编解码器WM8731的Verilog使用程序。-high-quality audio codec WM8731 Verilog procedures.